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Technology advantages of body sensor networks (BSN) have shown great deal of promises in various biomedical applications. An application specific integrated circuit (ASIC) for BSN towards Low frequency Low noise Low power (3Ls) design is presented in this paper. It includes fully differential front-end amplifier and filter array, a 12-bit analogue-to-digital converter (ADC), a 32bit RISC CPU ARM7TDMI, a scalable Fast Fourier Transform (FFT) module, human body channel communication (HBC) system and a wireless power interface with battery charger and management. Low noise and low power are achieved through the newly introduced ASIC design. The mixed signal ASIC has been implemented in standard 0.18-um 1P6M CMOS process and the die size of the whole chip is 5mm×5mm.