Opportunities in creating an effective metering
system based on a chip-level solution


               Meera Balakrishnan
...
Opportunities in creating an effective metering system
                        based on a chip-level solution


   Agenda
...
Key Technology and Solution Trends in Metering
   Market Trend                       Description                         F...
Freescale in Smart “Grid” Energy
                                                                             Metrology   ...
Energy Meter Types and Measurements
Type of Electricity Meters                                 Measured Quantities
Electro...
The Challenges of Electricity Meter Makers
1.   Lower system cost
2.   Accurate sensor measurements
3.   Energy calculatio...
Three‐Phase Electricity Meter
          Flash and Remote Update                                                           ...
MCF51EM256/128: Metrology & RTC
                               2ch       16-bit     2x 8-bit   Coldfire V1 Core with
BDM  ...
MCF51EM256 Key Features for E‐metering
           MCF51EM256                                     Customer needs
Independen...
Independent Robust Real Time Clock
                                     Block Diagram
                         IRTC_SYN   ...
16‐Bit SAR Analog‐to‐Digital Converter
                                                 Block Diagram
                    ...
Programmable Delay Block – Usage in Application
                PDB - ADC Integration                                     ...
Secure Flash Update – New Firmware Update
256K                                  Update method - 1                         ...
Secure Flash Update – EEPROM Emulation
256K
Block 1



             128K
            Emulated
              EE2

         ...
MCF51EM256 AMR Specific Connectivity
SCI Modules                                                      SPI Modules
 three ...
Multiple Clock Sources with Fail Safe Operation
                                                                          ...
32‐bit, 50MHz Coldfire V1 core with MAC
Address register     A0                                      D0           Data reg...
MCF51EM256 Performance with Metering Algorithms



• Implemented mostly in “C”:
   – Voltage and Current RMS 
     values
...
CodeWarrior for Microcontrollers V6.3 ‐ Special Edition
Special Edition Features:                          Licensing Proce...
MCF51EM256 Poly‐Phase Electricity Meter ‐ Features 
•Configurable to operate in:
     –   Three phase, 4 wire (3Ф‐4W)
    ...
MCF51EM256 Poly‐Phase Electricity Meter – Compliance with Standards 

  •The Electricity Meter Reference Design shall be 
...
MCF51EM256 Poly‐Phase Electricity Meter – Software Modules 
MCF51EM256 Poly‐Phase Electricity Meter ‐ Availability
Documentation                                        Software
  •  ...
Summary 
• Standard products can help solve key customer problems for metering systems
    – Maximize battery life  ultra...
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World Meter Design Presentation: Opportunities in creating an effective metering system based on a chip-level solution

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World Meter Design Presentation: Opportunities in creating an effective metering system based on a chip-level solution

  1. 1. Opportunities in creating an effective metering system based on a chip-level solution Meera Balakrishnan Global Segment Lead Freescale Semiconductor Munich, Germany TM
  2. 2. Opportunities in creating an effective metering system based on a chip-level solution Agenda • Energy Metering – Trends & Factors • Challenges in Energy Metering • An effective metering system based on a chip‐level solution  • MCF51EM256 Poly‐phase Reference Design • Summary
  3. 3. Key Technology and Solution Trends in Metering Market Trend Description Freescale’s Portfolio Evolution and Alignment Wired and Wireless  Wired and Wireless communications are the  PLM – SFSK, OFDM, MBUS (wired & wireless) Protocols key technologies used in today’s  AMI and  Zigbee SE profile, MC1322x; Freescale is focused developing  AMR designs NPIs for <1GHz frequency range to support AMI and AMR  networks. Low Power  With the shift to electrical gas and water  Key focus area for Freescale. 9S08GW family with S08L core  Consumption meters, power consumption is a key decision  suitable for long‐life gas, water meter applications. factor due to battery life requirements and  Freescale is indicating ideal products with an Energy  costs Efficient Solutions brand mark.  Peripherals  Focus on cost driving higher levels of  Differentiator and strength of Freescale across multiple  Integration integration product groups. Key example is the release of the MC1322x  and MCF51EM256 with ADC integrated. Communication  Home/energy gateways are using existing  Freescale offers i.MX25 and MPC8308 products for Energy  Within Home infrastructure gateway. Monitoring standards for HAN (Homeplug,  GreenPHY)   Emerging  Intelligent appliances within the home,  Digital signal controllers and microcontrollers portfolio  Applications that  micro‐grid generation (solar cells), Plug‐in  support these applications. Working closely with industry  Hybrid vehicles require appropriate interface  leaders to further develop solutions in this space. need interface to  and measurement technologies smart grids Smart Grids  Protocols emerging for control and  Freescale high‐end products (MPC83xx, QoRIQ) ideal fit for  Infrastructure  communication of various components in  these applications which require IEEE 1588, Ethernet,  Smart Grids  Security support. development 3
  4. 4. Freescale in Smart “Grid” Energy Metrology • Zigbee • Wifi • 802.15.4g • M-Bus • GPRS • OFDM • PLM • WiMax • WiMax • Zigbee Data HAN Energy Appliances NAN Gateway Concentrator (Aggregator) NAN HAN Utility NAN (Neighborhood Area Network) : Utility / NAN Metrology Home Area Network (HAN) Wireless or wired network to collect  Smart Energy Gateway meter  Data Concentrators &  Low End Metering  ZigBee consumption Aggregator  LL/LH/AC  Wifi information  i.MX257  Water, Gas & Heat  GPRS Metrology:  MPC8308,  GW  M-Bus Hardware that MPC8313  Smart 1-3ph Metering  HomePlug Green PHY measures and  P1021, P1012  MCF51EM256  Building Control Leadership controls flow of  Interfaces to NAN  Next gen  Coldfire, i.mx energy to/from  802.15.4g Radio 512/1MB building  Appliance Technology  Wimax  8-32bit MCUs & DSCs  PLM Partnership  Touch Sensor HAN (Home Area  Interfaces to Utility  RF4CE (wireless control) Network) : Wireless or wired  Wimax  Multi-media Processors network used for  GPRS  i.MX load control and  DLMS/COSEM High-end Processors dynamic response library  MPC8308 by utilities
  5. 5. Energy Meter Types and Measurements Type of Electricity Meters Measured Quantities Electromechanical meters • Active, Reactive, Apparent Energy • Being replaced by electronic meters today • Active, Reactive, Apparent Power • Limited accuracy • RMS, Peak Values (voltage/current) • Manual reading • Line frequency • Contains moving parts (aluminum ring) • Power Factor Electronic meters • Temperature • Uses MCUs, DSPs and ASICs for the metrology • Accurate measurement • Enhanced security Measurement Types • Equipped with AMR • No moving parts Single phase • Common in EU residential meters • One voltage and one current measurement • Use of shunt resistors prevail due to system low-cost Dual phase • Common in US residential meters • Two voltage and two current measurement • Use of current transformers and Rogowski coils prevail Three phase • Used in industrial meters • Three voltage and three current measurement • Use of current transformers and Rogowski coils prevail
  6. 6. The Challenges of Electricity Meter Makers 1. Lower system cost 2. Accurate sensor measurements 3. Energy calculation 4. Advanced sensor interfacing 5. Grounding and noise issues 6. Insufficient number of serial communication modules (I2C, SCI and SPI) 7. Low power RTC with onchip compensation and calendaring 8. Tamper detection capability and fault tolerance 9. In-field secure code update capability. 10. Insufficient uncommitted GPIOs after basic metering function
  7. 7. Three‐Phase Electricity Meter Flash and Remote Update IRTC and Security • Robust Flash Update • RTC Clock Compensation(0.119 PPM to 3906 PPM) • Dual Flash Architecture • Write protection LCD 288 segments (8 x 36) • Time stamping Tamper events • Protection against Battery Removal • Monotonic Counter • Low Voltage Protection 3v 44 • Dedicated Tamper Input • RTC current consumption (Standby) : around 1.5uA 1-16MHz Dual RTC 32 KHz Fault Tolerance Voltage Flash • Fail Safe Operation L1 • Independent WDOG L2 On Led L3 GPIO • On-chip comparator for Zero-crossing SCI • Hardware CRC accelerator L1 in CT Vref Opto (diag) SCI Opto (rdr) L1 out x10 SPI/IIC EE2 x100 L2 in CT ADC Battery SPI/IIC MRAM L2 out x10 ADC SCI/SPI Zigbee x100 SCI/SPI RF L3 in CT ADC monitor L3 out x10 SPI/SCI PLM x100 GPIO/ADC tamper N in CT ADC ADC N out x10 GPIO GPIO x100 GPIO Energy output pulse 0.1 kWhr/pulse Communication PDB for ADC Trigger • AMR SPI and AMR SCI • Programmable Delay block to trigger ADC. • High drive Output on SCI (for IR) • Allows Simultaneous triggering of voltage • Combination of SCI and Comparator and current channel by adjusting the delay support Opto receiver • Allows phase compensation from 0 to 7 7 degrees
  8. 8. MCF51EM256/128: Metrology & RTC 2ch 16-bit 2x 8-bit Coldfire V1 Core with BDM VREG GPI/O TPM MTIM MTIM • 32-bit MAC (16x16 signed/unsigned) • 50MHz performance providing power calculation and Core clock FLASHUPDATE communications capability 32KHz/ ► IRTC 1-16MHz 128K 128K ICS swap • Provides a real time calendar to allow utilities to osc Flash Flash implement different tariffs • Tamper detection mechanism to detect fraud IRTC SCI ► FLASHUPDATE 1.2v 32KHz Tamper detect • Implements a robust method of code update ref osc Calendaring • No meter readings can be lost • No code runaway upon power outage SAR ADC 2* SCI ► AMR SPI • Provides a 5v interface to external AMR modems 4 * 16bit Comparator ► Comparators with internal programmable reference (IR) sequencer 0 – 1.2v ref 2 * SCI SAR ADC • Allows a simpler optical interface ► 16-bit high speed SAR ADC 16K 16-bit • Simultaneous conversion SPI AMR SPI RAM CRC • CT phase shift compensation ► Low Power • The industry's benchmark low power implementation I2C KB I SPI AMR SCI ► Packages • 80LQFP, 100LQFP V1 ColdFire® LCD & MAC (1-8) x (43-36) 8
  9. 9. MCF51EM256 Key Features for E‐metering MCF51EM256 Customer needs Independent Robust Real Time Clock Tariff management, Tamper time stamping, Time and  Date keeping in standby modes  Fast & High Resolution ADC with  Measurement up to 64th harmonics, differential  Simultaneous Sampling channel inputs, simultaneous current and voltage  measurements. Programmable Delay Block Measurement triggering, sensor phase shift  compensation and reduction interrupt overhead.  Secure Flash Update Reliable in field code/tariff table updates without  stopping measurement and energy counting Connectivity (SPI, SCI, IIC) Communication peripherals supporting IR  communication and easy interfacing to 3.3V and/or  5V logic.  Multiple Clock Source Enables MCU to function with loss of crystal(s) clock. 32‐bit, 50MHz Coldfire V1 core with  Single core to perform calculations, meter  MAC management and communications. Professional Development Tools Simplicity, robustness, development tools, FreeMaster 9
  10. 10. Independent Robust Real Time Clock Block Diagram IRTC_SYN  Full clock – hour, minutes and seconds with option for storing values in BCD or binary format rtc_osc_buf_c lk rtc_os c_out_clk buffer 1’b0  Calendaring – day, month, year and day of the week with option rtc_osc_clk _in Clock Prescaler rtc_off_chip_clk for storing values in BCD or binary format Compensation  Auto adjustment for day light saving with user defined parameters rtc_cal_out bal_1hz_clk_in config_data  Automatic month and leap year adjustment rtc_int_b Register Space rtc_alarm Time, Calendar & Stopwatch Alarm  Programmable alarm with interrupt - output from IRTC in case MCU Matching Counters rtc_por wants to use it as a wakeup event rtc_supply rtc_ground  Seven periodic interrupts Counter Control IPS Bus Write Protect Stae Machine Decode (with Day Light Saving Control)  Minute countdown timer with minute resolution RTC Control  32.768 kHz input clock with option to output the clock for use in the MCU’s ICS tamper StandBy StandBy Tamper detec t  Hardware compensation to compensate 1 Hz clock against frequency RAM Isolation Detection battery disconnect variations in oscillator clock due to temperature or crystal characteristics (correction in range from ±.12ppm up to ±3900ppm). cpu_high_voltage IPS_Interface rtc_standby_b  Reset to the IRTC block is generated only when both battery supply and CPU power are removed and either is powered up Tamper Detection Unit  Battery operation (standby mode) ensures seamless IRTC operation when CPU power is removed  Tamper detection to detect illegal access into the system (time stamp stored on tamper event)  Non volatile 32-bit Counter (can be used for energy counting)  32 bytes of standby RAM  Supply current 1.5A (powered from VBAT) Non volatile 32-bit Counter
  11. 11. 16‐Bit SAR Analog‐to‐Digital Converter Block Diagram  Linear successive approximation converter with up to 16-bit ADHWTSA ADCSC1A resolution ADHWTSn Conversion  Up to 4 pairs of differential and 24 single-ended external Trigger Control ADTRG ADCSC1n analog inputs ADHWT Compare true 1 Control Registers (ADCSC2, ADCCFG1, ADCCFG2)  ADC clock range is 1-8MHz, so conversion times range from 2.7us to 1.9ms with a bus clock of 25MHz. ADCHn ADACKEN COCOn AIENn ADLPC ADLSMP DDIFFn  Self-Calibration mode (offset and gain calibration) complete ADICLK ADCO MODE trigger Asynch. ADIV Clk. Gen  Hardware average function to increase resolution (up to 32x) Interrupt ADACK  Selectable voltage reference, Internal, External, or Alternate Control ADCK Clock MCU STOP Sequencer Divide Bus Clock  Dual result registers - two sequential conversions /2 DADP0  Output Modes: Differential 16-bit, 13-bit, 11-bit and 9-bit modes, or transfer initialize convert sample ALTCLK abort Single-ended 16-bit, 12-bit, 10-bit and 8-bit modes DADP3 AD4 ADVINP PG,MG ADCxG  Output formatted in 2’s complement 16b sign extended for ADVINM CLPx differential modes AD23 SAR ADCCLPx TempP Converter CLMx  Output in right-justified unsigned format for single-ended ADCCLMx  Single or continuous conversion (automatic return to idle after single conversion) DADM0 Offset CFS ADCOFS Calibration  Configurable sample time and conversion speed/power Subtractor DADM3 CAL CALF  Conversion complete / Hardware average complete flag and TempM Averager AVGE,AVGS ADCSCs interrupt V REFSH ADCCFG1,2  Input clock selectable from up to four sources MODE, DIFFn Formatting  Operation in wait or stop3 modes for lower noise operation ADCRHA:ADCRLA VREFH  Asynchronous clock source for lower noise operation with option VALTH VBGH transfer to output the clock V REFSL ADCRHn:ADCRLn  Selectable asynchronous hardware conversion trigger with VREFL ACFE VALTL Compare ACFGT,ACREN ADCSC2 hardware channel select Logic Compare true VBGL 1  Automatic compare with interrupt for less-than, greater-than or CV1 CV2 equal-to, within range, or out-of-range, programmable value ADCCV1, ADCCV2  Integrated Temperature sensor
  12. 12. Programmable Delay Block – Usage in Application PDB - ADC Integration  Significantly reduces interrupt loading! PreTriggerA DADP1 Trigger Result A DADM1 Reg. A: Live 1 CT  ADC has two result registers PreTriggerB Result B AD3 Reg. B: Live 1 Voltage TriggerA ADC1 Reg. C: auxiliary 1.  One interrupt per Ch1 AD4 TriggerB COCOA measurement period COCOB PreTriggerA DADP2 Result A DADM2 Reg. A: Live 2 CT PreTriggerB Result B AD5 Reg. B: Live 2 Voltage Ch2 TriggerA TriggerB ADC2 COCOA COCOB PDB PreTriggerA DADP0 PreTriggerB Result A DADM0 Reg. A: Live 3 CT Result B Ch3 AD6 Reg. B: Live 3 Voltage TriggerA TriggerB ADC3 COCOA COCOB PreTriggerA DADP3 Result A DADM3 Reg. A: Neutral CT PreTriggerB Ch4 TriggerA Result B AD7 Reg. B: auxiliary 2. TriggerB ADC4 VREF0 COCOA VREFH VREFL Bandgap Start possible for second ADC (Reg. B) COCOB Temp Sensor Duration of the first ADC conversion (Reg. A)
  13. 13. Secure Flash Update – New Firmware Update 256K Update method - 1 256K 1. Code in block 0 writes new application Block 0 Block 1 Update to block 1 [left diagram] Old Application 2. AFTER new code validated, flash Application space selector set to 0 (swapping blocks) Comms Routine - copy Power calculation - copy 3. New/updated code in block 1 is Comms Routine Power calculation Interrupt Vectors - copy executed in low address space [right Interrupt Vectors 128K diagram] 128K • New application can replicate itself into block 0 Block 1 for further fault tolerance Block 0 • Swapping of flash blocks is controlled and Updated Application maintained over power cycles Application Notes Comms Routine Comms Routine - copy • After MCU POR & RTC POR, flash selector = 0 Power calculation • Flash selector is: Power calculation - copy 0 Interrupt Vectors • Powered by RTC power supply 0 Interrupt Vectors - copy • MCU reset does NOT change state • Power is maintained through MCU power cycles Flash Selector = 0 • Only upper flash block is erased / written Flash Selector = 1 Non volatile • Software controlled switch between blocks, instantaneous (~ 40nS) Non volatile • Flash can be used as a single code space 13
  14. 14. Secure Flash Update – EEPROM Emulation 256K Block 1 128K Emulated EE2 The second flash block can 128K be used exclusively for data storage if firmware Block 0 Application updates are not required by the application. Comms Routine Power calculation 0 Interrupt Vectors Flash Selector = 0 Non volatile 14
  15. 15. MCF51EM256 AMR Specific Connectivity SCI Modules SPI Modules  three modules on all packages  three modules on 100-pin LQFP package (two  wakeup from stop3 on Rx edge. modules on 80-pin LQPF package)  SCI2: Tx pin in open drain mode to support  with full-duplex or single-wire bidirectional; double- interfacing to AMR (eg PLM or RF) operating at 5V buffered transmit and receive; master or slave mode; MSB-first or LSB-first shifting  IR communication support  SPI1: with 32-bit FIFO buffer, 16-bit or 8-bit data  SCI1 and SCI2: Tx pins can be modulated with transfers timer outputs for use with IR interfaces (frequency determined by the timer)  SPI2 and SPI3: standard SPI with no FIFO and 8-bit data transfer  SCI1 and SCI2: Rx pins can be routed from a programmable comparator (opto receiver).  SPI3: open drain outputs on SCLK and (MISO OR MOSI). These, coupled with off-chip pull-up resistors, allow half-duplex interface to a 5 V SPI interface. SPI Master 5V PLC / RF Interfacing IR Receiver Routing via Comparator IR Transmitter Routing with Pulsed Output SPI Slave 5V PLC / RF Interfacing Freescale Confidential Proprietary
  16. 16. Multiple Clock Sources with Fail Safe Operation  Device powers-up from internal RC oscillator Block Diagram after reset.  Clock Options: EXTAL1 EXTAL2  External 32.768 kHz crystal (XTAL1-EXTAL1) XTAL1 XTAL2  External 1-16 MHz crystal (XTAL2-EXTAL2) Separate Power Domain  Internal 32 kHz RC oscillator (max. +/- 2% total Independent deviation of trimmed DCO output frequency XOSC2 XOSC1 RTC VBAT over voltage and temperature range) Clock Check & Select  Internal reference clock has 9 trim bits available OSCOUT2  Clock Check & Select Block checking health of OSCOUT1 3-possible clock sources using self test that can run at any time: To LCD  Three 8-bit registers counts 3-possible clock ICSIRCLK 3V VBAT sources for the same amount of time  When any counter hits the maximum value of 0xFF the test is terminated oscillator control ICS  Software can then compare the three registers to obtain a crude (~1.2%) measure of how well these three frequencies correlate.  Internal Clock Source (ICS) contains Frequency- locked loop (FLL) block which drives processor core speed up to 50.33 MHz (peripherals operate at half of this speed) at 3.6 V to 2.5 V and 20 MHz at 2.5 V to 1.8 V 16
  17. 17. 32‐bit, 50MHz Coldfire V1 core with MAC Address register A0 D0 Data register A7 - Stack D7 Instruction IAG Address Supervisor stack CCR Generation IC Instruction Address[31:0] Instruction Fetch Cycle Program Counter Vector Base Register CPU Configuration Register Fetch Pipeline 32-bit IB FIFO Instruction Buffer ALU Decode & Sel. read_data[31:0] • Coldfire® architecture, instruction & operand pipeline Operand DSOC Operand Fetch write_data[31:0] Execution • 32-bit ALU Pipeline Address AGEX Generation Execute • 32-bit address & data registers • 50MHz core speed ColdFire Processor Core Pipelines • Un/signed 32-bit MAC (16x16) • Long word operations and operand handling • 8 Data registers, no need to move each accumulators result BKGD 1 2 GND to memory before a new operation. No Connect 3 4 RESET • No need for paged memory, Faster access to data tables No Connect 5 6 VDD and code. BDM Debugging Interface 17
  18. 18. MCF51EM256 Performance with Metering Algorithms • Implemented mostly in “C”: – Voltage and Current RMS  values – Active Energy, Active Power,  Apparent Power, Reactive  Power and Power Factor – DFT (Discrete Fourier  Transform) – THD (Total Harmonic   Documentation and Distortion) Code Available For more information refer to: http://www.freescale.com/files/32bit/doc/app_ note/AN3896.pdf 18
  19. 19. CodeWarrior for Microcontrollers V6.3 ‐ Special Edition Special Edition Features: Licensing Procedure: • New Project Wizard • Key is permanent, free of charge and • MCU Change Wizard automatically installed with the software • Unlimited assembler (absolute, relocatable, Support: mixed and in-line) for HC(S)08, RS08, ColdFire V1 microcontrollers • 1 year support included • Highly optimized ANSI C compilers and C C-Compiler Upgrade: source level debugger • HC(S)08 – 32K • One upgrade package, which includes • ColdFire V1 – 64K • HC(S)08 – 64K • Emulator-like complex debug capability for • ColdFire V1 – 128K HCS08 and ColdFire V1 microcontrollers • Fast Flash programming: • HC08: Via MON08 • HCS08, RS08, ColdFire V1: Via BDM • Full-chip Simulator for HC(S)08/RS08 • UNIS Device Initialization tool to generate HC(S)08, RS08, ColdFire V1 CPU and peripheral initialization code • UNIS Processor Expert™ with components for HC(S)08 and ColdFire V1 CPUs and most on-chip peripherals
  20. 20. MCF51EM256 Poly‐Phase Electricity Meter ‐ Features  •Configurable to operate in: – Three phase, 4 wire (3Ф‐4W) – One phase, 1 wire (1Ф‐2W) – One phase, 1 wire (1 Ф‐3W) •Measurement & LCD display of:  – US and European voltage specifications: full scale being 120V+/‐ 20%, 230V +/‐ 10% – US and European current specification: full scale being 100A US, 60A Europe  – Phase wise RMS Voltage (Accuracy ±1% of full Scale) – Phase wise RMS Currents  and neutral current (Accuracy ±1% of full scale) – Phase wise and Net Active Power (Accuracy ±1% of full Scale) – Phase wise and Net Reactive Power (Accuracy ±1% of full Scale) – Phase wise and Net Apparent Power (Accuracy ±1% of full Scale) – Phase wise and Net Power Factor (Accuracy ± 0.1PF or better) – Line Frequency (Accuracy ± 0.5Hz or better) – Tamper Count – Active Energy ‐ Class 0.5 or better  – Reactive energy ‐ Class 2 or better – Apparent Energy ‐ Class 2 or better – Display Date and Time of the Meter – Maximum Demand •Operating frequency range 50Hz ±3Hz or 60Hz ±3Hz •Measurement & storing of the following parameters: – Imported & Exported kWh  – Imported kVArh (Leading and Lagging) – Exported kVArh(Leading and Lagging) – Imported & Exported kVAh •Tamper Detection •Optical Port Interface (IEC62056‐21, ANSI C12.18) •Serial port for calibration and diagnostics •Navigation using 3 keys (UP, DOWN & ACK/RESET) •Expansion port for AMR via SCI and SPI 20
  21. 21. MCF51EM256 Poly‐Phase Electricity Meter – Compliance with Standards  •The Electricity Meter Reference Design shall be  compliant with the following standards: •IEC 62053‐22 International Energy Metering  Specification, class 0.5 (or better) for active energy •IEC 62053‐23  International Energy Metering  Specification, class 2 for reactive energy •ANSI C12.18 standards for optical interface •IEC 62056‐21 International Energy Metering data  exchange Specification •IEC 62053‐22, IEC 62053‐23, IEC 62052‐11 Electro  Static Discharge (ESD), tested per IEC 61000‐4 21
  22. 22. MCF51EM256 Poly‐Phase Electricity Meter – Software Modules 
  23. 23. MCF51EM256 Poly‐Phase Electricity Meter ‐ Availability Documentation Software • Reference Design Manual (PDF) • Schematics (OrCAD) • Software source code as a CodeWarrior project, including APIs • PCB design (Allegro) • Compiled size of the entire software • BOM (PDF) package is less than 128KB • Enclosure data sheet (PDF) • Wiring diagram (PDF) Reference design system • Pre-compliance test documents (PDF) • 110V configuration • Functional test documents (PDF) • 230V configuration • 110V configuration Technical Specification (PDF) • 230V configuration Technical Specification (PDF) • Individual component data sheets and further detailed documentation is available Find the poly-phase reference design at www.freescale.com/metering 23
  24. 24. Summary  • Standard products can help solve key customer problems for metering systems – Maximize battery life  ultra low power 8bit & 32bit MCUs – Reliable readings  fast & accurate on‐chip ADCs – Integration  memory, LCD ctrl, analog – Communication I/F  ZigBee, 802.15.4, and Ethernet – Apart of Standards  IEEE 802.15.4, ZigBee Alliance, PRIME (PLC), HomePlug ?? • Commitment to the market with products and solutions that have  characteristics important to the metering segment: – Longevity of product available – Quality • Breath of products spanning from RF to Sensors to MCUs to MPUs • Mix & match IP allowing specific metering solutions • Enablement – Reduce product development cost – Improve time‐to‐market and time‐in‐market Learn more about Freescale Solutions in Smart Metering – Come visit us at Booth 502
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