Mateo valero p2
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    Mateo valero p2 Mateo valero p2 Document Transcript

    • Green/Top 500 June 2011 Top500 rank Processor CPU Type Cores CPU Speed Peak FP Power Gflops/ Date wat BG/L PPC 440 2 700 MHz 5.6 GF 17 watts 0.33 2004 BG/P PPC 450 4 850 MHz 13.6 GF 16 watts 0.85 2007 BG/Q PPC A2 18 1.6 GHz 205 GF 55 watts 3.72 2011 BG/L: 205 Mflops/watt BG/Q: 1689 Mflops/watt BG/P: 379 Mflops/watt BG/Q: 2000 Mflops/watt Mflops/watt Mexico DF, November, 2011 SBAC-PAD, Vitoria October 28th, 2011 41Green500MinoTauro - First in Europe ● - November 2011 ● Most performing system in Europe ● World: 7 ● 1st of the 3rd architecture in the list ● 1266.26 1266 26 Mflops/Watt ● ● Most performing system in Spain ● World: 114, Europe: 35 ● 15 Tflops peak en x86_64 ● 167 Tflops peak en GPU ● 128 compute nodes ● 2 Intel chips, E5649 2,53 GHz 6-Cores ● 2 GPU NVIDIA M2090 ● 24 GB RAM DDR3, 1 SSD 250GB ● 2 x IB QDR Mexico DF, November, 2011 42 1
    • MinoTauro: the mostenergy-efficient computer in Europe MinoTauro is highest ranking European machine in the November 2011 edition of the Green500 List The 7th most energy-efficient in the energ efficient world, the 3rd by architecture Based on bullx nodes, equipped with Intel processors and NVIDIA GPUs “The Bullx systems help institutions to reinforce Europe’s future competitiveness. Bull strongly believes in this competitiveness, which can only be expressed through joining our R+D capabilities. In this sense the BSC is an example to all of us.” Julio del Valle, Director of Bull SpainMexico DF, November, 2011 43Mexico DF, November, 2011 Thanks to S. Borkar 44 2
    • Mexico DF, November, 2011 Thanks to S. Borkar 45Mexico DF, November, 2011 Thanks Bill Dally 46 3
    • Mexico DF, November, 2011 47… and systems ● PRACE prototype @ BSC: ARM + mobile GPU Tegra3 Q7 module: 1x Tegra3 SoC 4x Corext-A9 @ 1.5 GHz Rack: 4 GB DDR3 DRAM 32x Board container 1U Multi-board container: 6 GFLOPS 10x 48-port 1GbE switches 1x Board container ~4 Watt 256x Q7 carrier boards 8x Q7 carrier boards 1 Gbe interconnect 256x Tegra3 SoC 32x ARM Corext-A9 Cores 1024x ARM Corext-A9 Cores 8x GT520MX GPU 256x GT520MX GPU Nvidia GeForce 520MX 32 GB DDR3 DRAM 1TB DDR3 DRAM 48 CUDA cores @ 900 MHz 1.2 TFLOPS 38 TFLOPS 142 GFLOPS ~140 Watt ~5 Kwatt 12 Watts 11.8 GFLOPS / W 7.5 GFLOPS / W ● Mont-blanc Mont blanc ● EC funded project, Just started ● Low power, Embedded technology exascale ● Low power components + MPI/OmpSs ● Integrated prototype, applications and future system design48 Mont-Blanc ICT-288777 Mexico DF, November, 2011 48 4
    • EU Mont-Blanc project Exascale approach using European embedded power-efficient technology ● Objective 1: Develop a prototype system based on #1 competitive embedded technology ● 2013: Scalable to 50 PFLOPS on 7 Mwatts (7 GFLOPS / Watt ( efficiency) #1 competitive ● Objective 2: Design next-generation system to lead the Exascale race ● 2017: Scalable to 200 PFLOPS on 10 Mwatts (20 GFLOPS / Watt) ● Objective 3: Develop a suite of exascale-class applications using the OmpSs task-based programming model for scalability and efficiency Hw and Sw providers HPC application and integrators providers Mexico DF, November, 2011 49Energy-efficient prototypeseries @ BSC 200 PFLOPS 10 MWatt 20 GF/W 50 PFLOPS 7 MWatt 7 GF/W 1024 nodes 152 TFLOPS 20 Kwatt 256 nodes 512 GFLOPS3.5 GF/W 1.7 Kwatt0 2 GF/W0.2 2011 2012 2013 2014 2015 2016 2017 ● Start from COTS components ● Move on to integrated systems and custom HPC technology Mexico DF, November, 2011 50 5
    • Mont-Blanc: designing a newenergy-efficient Exascale machine Project will: Build a fully functional prototype using commercially available low-power embedded technology Design D i an E Exascale machine t l hi to overcome limitations identified in the prototype Develop Exascale applications to run on this new generation of HPC systems “Supercomputers, once built from hancrafted circuitry, were t i it transformed when companies f d h i started assembling them from inexpensive PC- style microprocessors. Researchers in Barcelona are placing an early bet that the next big leap will be cellphone chips.” The Wall Street JournalMexico DF, November, 2011 51 Barcelona Supercomputing Center ● The BSC-CNS objectives: ● R&D in Computer Sciences, Life Sciences and Earth Sciences ● Supercomputing support to external research ● BSC-CNS is a consortium that includes : ● the Spanish Government (MEC) – 51% ● the Catalonian Government (DIUE) – 37% ● the Technical University of Catalonia (UPC) – 12% ● 350 people lMexico DF, November, 2011 52 6
    • Location Mexico DF, November, 2011 53 Zaragoza, Marzo, 2011 Mexico DF, November, 2011 54 7
    • Spanish Supercomputing Network BSC - MareNostrum Processor: 10240 PowerPC 970 2.3 GHz Memory: 20 TBytes Disk: 462 TBytes Network: Myrinet, Gigabit, 10/100 System: Linux UPM Processor: 3920 Power7 3.3 GHz Memory: 7.8 TBytes Disk: 190 TBytes Network: IB QDR, Gigabit, 10/100 System: Linux IAC, UMA, UC, UZ, UV Process: 512 PowerPC 970 2.2 GHz Memory: 1 TByte Disk: 14 + 10 TBytes Network: Myrinet Gigabit 10/100 Myrinet, Gigabit, System: Linux Gobierno Canarias (ITC) Process: 336 PowerPC 970 2.3 GHz Memory: 672 GByte Disk: 3 TBytes Network: Myrinet, Gigabit, 10/100 System: Linux Mexico DF, November, 2011 55BSC in Europe – Current Projects Computer Sciences Storage Systems Computer C Architecture Grid Computing (3 groups) and Clusters Autonomic Systems and e-Business Platforms Programming OPTIMIS Models HOPSA‐EU Performance Tools Mexico DF, November, 2011 56 8
    • BSC in Europe - Current Projects Applications COPA GT Earth Sciences Field-AC Life Sciences PELE TRANSPLANT BLUEPRINT Operations Mexico DF, November, 2011 57BSC in Europe – Finished Projects Computer Sciences Mexico DF, November, 2011 58 9
    • BSC-Microsoft Institute ● Created in January 2008… collaboration started in April 2006 ● Microsoft Research Cambridge y Redmond ● Research topics: ● Transational Memory ● Advanced architectures for mobile devices ● Object-oriented computer architecture ● St ff Staff: ● 3 senior PhD and 25 PhD students Mexico DF, November, 2011 59 Intel and BSC announce Exascale R&D Lab Multi-year agreement signed to create the Intel and BSC Exascale Laboratory in Barcelona Focus on Programming Models, Performance Tools and Applications Lab latest member of European research network Intel Labs Europe “BSC is one of Europe’s most renowned HPC labs and offers very interesting technology to scale run time systems, tools and applications up to exascale level.” Stephen Pawlowski, Intel Senior Fellow and general manager of Intel’s Datacenter and Connected Systems Pathfinding (11-17-2011) (11-17-2011) Mexico DF, November, 2011 60 10