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Software Developers View of Hardware Understanding Flip-Flops
What is a Flip-Flop? <ul><li>A flip-flop is a  bistable  device. </li></ul><ul><li>This means that output from the device ...
Components <ul><li>A flip-flop has three (3) basic components: </li></ul><ul><ul><li>Latch </li></ul></ul><ul><ul><li>Cloc...
Latches <ul><li>The most basic of all latches is the RS latch. </li></ul><ul><li>There are TWO types of RS latches, they a...
Latches <ul><li>The basic understanding behind a latch is that if 1 is sent as the  SET  input then the output (Q) will be...
NOR Latch <ul><li>Firstly, lets look at the  RESET  condition. (Send 1 as RESET input) </li></ul>1 0
Look at the Truth!!!!!! 0 1 1 0 0 1 0 1 0 1 0 0 X B A
Look at the Truth!!!!!! 0 1 1 0 0 1 0 1 0 1 0 0 X B A
NOR Latch <ul><li>So therefore, if an at least one input is a 1 then the only possible output can be 0. </li></ul>1 0
NOR Latch <ul><li>So therefore, if an at least one input is a 1 then the only possible output can be 0. </li></ul>1 0 0 0 ...
NOR Latch <ul><li>Next, lets look at the  SET  condition. (Send 1 as SET input) </li></ul>0 1
NOR Latch <ul><li>Next, lets look at the  SET  condition. (Send 1 as SET input) </li></ul>0 1 0 0 1 1
NOR Latch <ul><li>Next, lets look at the  HOLD  condition. (Will hold what ever was the previous output) </li></ul>0 0 0 1
NOR Latch <ul><li>Next, lets look at the  HOLD  condition. (Will hold what ever was the previous output) </li></ul>0 0 0 1...
NOR Latches <ul><li>This is where the see saw effect comes into play: </li></ul>
NOR Latch <ul><li>Finally, for a NOR latch when 1 and 1 are both entered this violates logic rules because Q and NOT Q can...
NOR Latch Truth Table
NAND Latch <ul><li>Firstly, lets look at the  RESET  condition. (Send 1 as RESET input) </li></ul>0 1
Look at the Truth!!!!!! 0 1 1 1 0 1 1 1 0 1 0 0 X B A
Look at the Truth!!!!!! 0 1 1 1 0 1 1 1 0 1 0 0 X B A
NAND Latch <ul><li>Firstly, lets look at the  RESET  condition. (Send 1 as RESET input) </li></ul>0 1 1 1 0 0
NAND Latch <ul><li>Next, lets look at the  SET  condition. (Send 1 as SET input) </li></ul>1 0 1 1 0 0
NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>0 1
NAND Latch <ul><li>A point to remember is that a NAND flip flop works oppositely to a NOR flip flop so an input of (0 0) i...
NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depen...
NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depen...
NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depen...
NAND Latch <ul><li>Complete the following truth table depending on the inputs shown. </li></ul>1 0 1 1 Q’ Q D C B A
Clocked RS Latch <ul><li>The logic behind this logic gate is the fact that there is another input called  ENABLED. </li></...
Clocked RS Latch
Clocked RS Latch
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Understanding Flip Flops

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Transcript of "Understanding Flip Flops"

  1. 1. Software Developers View of Hardware Understanding Flip-Flops
  2. 2. What is a Flip-Flop? <ul><li>A flip-flop is a bistable device. </li></ul><ul><li>This means that output from the device can be one of two possible states and will remain that way even after input signals are removed. </li></ul><ul><li>A flip-flop will only change state when commanded. </li></ul><ul><li>Because of this they form the basis of memory. </li></ul>
  3. 3. Components <ul><li>A flip-flop has three (3) basic components: </li></ul><ul><ul><li>Latch </li></ul></ul><ul><ul><li>Clock </li></ul></ul><ul><ul><li>Trigger </li></ul></ul>
  4. 4. Latches <ul><li>The most basic of all latches is the RS latch. </li></ul><ul><li>There are TWO types of RS latches, they are: </li></ul>NOR Latch NAND Latch
  5. 5. Latches <ul><li>The basic understanding behind a latch is that if 1 is sent as the SET input then the output (Q) will be 1. </li></ul><ul><li>Likewise, if 1 is sent to the RESET input then the output (Q) will be 0. </li></ul><ul><li>The most important part is FEEDBACK which enables the latch to carry out the task of enabling memory. </li></ul>
  6. 6. NOR Latch <ul><li>Firstly, lets look at the RESET condition. (Send 1 as RESET input) </li></ul>1 0
  7. 7. Look at the Truth!!!!!! 0 1 1 0 0 1 0 1 0 1 0 0 X B A
  8. 8. Look at the Truth!!!!!! 0 1 1 0 0 1 0 1 0 1 0 0 X B A
  9. 9. NOR Latch <ul><li>So therefore, if an at least one input is a 1 then the only possible output can be 0. </li></ul>1 0
  10. 10. NOR Latch <ul><li>So therefore, if an at least one input is a 1 then the only possible output can be 0. </li></ul>1 0 0 0 1 1
  11. 11. NOR Latch <ul><li>Next, lets look at the SET condition. (Send 1 as SET input) </li></ul>0 1
  12. 12. NOR Latch <ul><li>Next, lets look at the SET condition. (Send 1 as SET input) </li></ul>0 1 0 0 1 1
  13. 13. NOR Latch <ul><li>Next, lets look at the HOLD condition. (Will hold what ever was the previous output) </li></ul>0 0 0 1
  14. 14. NOR Latch <ul><li>Next, lets look at the HOLD condition. (Will hold what ever was the previous output) </li></ul>0 0 0 1 0 1
  15. 15. NOR Latches <ul><li>This is where the see saw effect comes into play: </li></ul>
  16. 16. NOR Latch <ul><li>Finally, for a NOR latch when 1 and 1 are both entered this violates logic rules because Q and NOT Q cannot be the same. </li></ul><ul><li>It is referred to as being illegal. </li></ul>
  17. 17. NOR Latch Truth Table
  18. 18. NAND Latch <ul><li>Firstly, lets look at the RESET condition. (Send 1 as RESET input) </li></ul>0 1
  19. 19. Look at the Truth!!!!!! 0 1 1 1 0 1 1 1 0 1 0 0 X B A
  20. 20. Look at the Truth!!!!!! 0 1 1 1 0 1 1 1 0 1 0 0 X B A
  21. 21. NAND Latch <ul><li>Firstly, lets look at the RESET condition. (Send 1 as RESET input) </li></ul>0 1 1 1 0 0
  22. 22. NAND Latch <ul><li>Next, lets look at the SET condition. (Send 1 as SET input) </li></ul>1 0 1 1 0 0
  23. 23. NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>0 1
  24. 24. NAND Latch <ul><li>A point to remember is that a NAND flip flop works oppositely to a NOR flip flop so an input of (0 0) is illegal. However, an input of (1 1) cause the gate to remember the previous input. </li></ul>
  25. 25. NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depends on the see saw.
  26. 26. NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depends on the see saw.
  27. 27. NAND Latch <ul><li>Next, lets look at the if 1 is sent to both inputs. </li></ul>1 1 What you will notice is that it depends on the see saw. 1 0
  28. 28. NAND Latch <ul><li>Complete the following truth table depending on the inputs shown. </li></ul>1 0 1 1 Q’ Q D C B A
  29. 29. Clocked RS Latch <ul><li>The logic behind this logic gate is the fact that there is another input called ENABLED. </li></ul><ul><li>This acts like a gate or a switch and when set to 1 the circuit will respond as usual. However, when it is set to zero the circuit will not respond. </li></ul>
  30. 30. Clocked RS Latch
  31. 31. Clocked RS Latch
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