Formal Verification of Device State Chart Models
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Formal Verification of Device State Chart Models

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"Formal Verification of Device State Chart Models" by Fulvio Corno, Muhammad Sanaullah at the 7th International Conference on Intelligent Environments, Nottingham, UK, 2011

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    Formal Verification of Device State Chart Models Formal Verification of Device State Chart Models Presentation Transcript

    • Politecnico di Torino Dipartimento di Automatica e Informatica Torino, Italy http://elite.polito.it Formal Verification ofDevice State Chart ModelsFulvio Corno, Muhammad Sanaullah
    • Outline Design process Formalisms Verification Methodology Results Conclusions 2 IE2011, Nottingham UK Formal Verification
    • Design process for IE Intelligent environments Requirements Validation gaining acceptance  More installations Analysis, Design Verification  Standard solutions Need more structured Project Simulation design process  Less “art”  More “engineering” Implementation System Emulation HW SW 3 IE2011, Nottingham UK Formal Verification
    • Reference model Wall switch Tangible PC Smartphone User Interface Agents Fuzzy Rules Algorithm Intelligence Access point Protocols Gateway Model Framework Middleware Sensor Meter Actuator Bus Wearable Wireless Devices4 IE2011, Nottingham UK Formal Verification
    • General Goals Adopt formal representations to allow a sound design process Enable validation and verification throughout the design process Integrate the solution in the Dog2.1gateway toolset 5 IE2011, Nottingham UK Formal Verification
    • Adopted formalismsLevel Design artifact Technique Formalism SystemUser Interface Temporal Logics UCTL requirements IntelligentIntelligence State machines UML Statecharts algorithms Device categories Ontology DogOnt classesMiddleware System Ontology DogOnt instances configuration Device models State machines UML StatechartsDevices Whole system Parallel state UML Statecharts behavior machines 6 IE2011, Nottingham UK Formal Verification
    • The DogOnt ontology Formalism UCTL UML Statecharts DogOnt classes DogOnt instances UML Statecharts UML Statecharts7 IE2011, Nottingham UK Formal Verification
    • DogOnt instances: DimmerLamp Formalism UCTL UML Statecharts DogOnt classes DogOnt instances UML Statecharts UML Statecharts8 IE2011, Nottingham UK Formal Verification
    • Overall system components …to be continued… System Configuration DogOnt Load model Gateway Sense & Control Real devices9 IE2011, Nottingham UK Formal Verification
    • Device modeling Ontologies are declarative formalisms: device properties For device behavior we need an operational formalism  Statecharts (Harel, 1987, now in UML 2.0) Formalism UCTL UML Statecharts DogOnt classes DogOnt instances UML Statecharts UML Statecharts 10 IE2011, Nottingham UK Formal Verification
    • Use cases Ontologies are declarative formalisms: device properties For device behavior we need an operational formalism  Statecharts (Harel, 1987, now in UML 2.0) We use Statecharts for  Modeling the behavior of each device type  Implementing the Intelligent Algorithms within the gateway  Building a whole-system model allowing simulation and emulation Statecharts have a formal semantics: formal verification is possible 11 IE2011, Nottingham UK Formal Verification
    • Overall system components …to be continued… System Configuration DogOnt Load model Run Gateway Intelligent Algorithms Sense & Control Real devices12 IE2011, Nottingham UK Formal Verification
    • Overall system components …to be continued… Device Statechart System Composition Configuration DogOnt Load Whole model Environment Model Simulation Run Emulation Gateway Intelligent Algorithms Composition Sense & Whole System Control Model Simulation Real devices13 IE2011, Nottingham UK Formal Verification
    • Temporal logic UCTL logic Examples  Branching-time  State-based and action-based  Operators  Next (X,N)  Future (F)  Globally (G) Formalism  All (A) UCTL  Exists (E) UML Statecharts  Until (U) DogOnt classes UMC Model Checker DogOnt instances  Supports Statecharts as a model UML Statecharts UML Statecharts 14 IE2011, Nottingham UK Formal Verification
    • Overall system components Systemrequirements Device Statechart System Composition Configuration Formal DogOnt Load Whole Verification model Environment Model Simulation Run Emulation Gateway Intelligent Algorithms Composition Formal Sense & Whole System Verification Control Model Simulation Real devices15 IE2011, Nottingham UK Formal Verification
    • But… (goal of this paper) Formal verification relies on the composition of device state charts Environment control relies on information in DogOnt device properties How to ensure their consistency? Solution: use formal verification, too 16 IE2011, Nottingham UK Formal Verification
    • The problem17 IE2011, Nottingham UK Formal Verification
    • The problem • Naming consistency for states • Naming consistency for commands • Naming consistency for notifications • Acceptance of commands • Reachability of declared states • Generation of declared notification • Range of numeric status variables18 IE2011, Nottingham UK Formal Verification
    • Approach From DogOnt, extract Device UCTL properties Statechart From DogOnt, build a DogOnt synthetic environment for the device Hostile synthetic Closed system environment model Integrate Device State Chart in the synthetic environment UCTL Model properties Checking For every property  Run Model checher OK ERR 19 IE2011, Nottingham UK Formal Verification
    • Approach  From DogOnt, extract DeviceBuilding a closed system model, ready for verification UCTL properties Statechart  From DogOnt, build a DogOnt synthetic environment for the device Hostile synthetic Closed system environment model  Integrate Device State Chart in the synthetic environment UCTL Model properties Checking  For every property  Run Model checher OK ERR 20 IE2011, Nottingham UK Formal Verification
    • Approach From DogOnt, extractExample: DimmerLamp generated & verified Deviceproperties UCTL properties Statechart--Action Properties From DogOnt,true a build --the{sending(stepDown)}the commands in DSC EF acceptance of all DogOnt synthetic environment for EF {sending(stepUp)} true EF {sending(set)} true the device true EF {sending(off)} true EF {sending(on)} Hostile synthetic Closed system -- environment model Integrate (stepUp)} true Device State EF {accepting (stepDown)} true EF {accepting Chart in the synthetic EF {accepting (set)} true EF {accepting (off)} true environment true EF {accepting (on)} UCTL Model --the generation of all the notifications in DSC properties Checking For every property EF {sending(stateChanged)} true EF {accepting(stateChanged)} true  Run Model checher--State Properties OK ERR --the reachability of all the states in DSC EF (offState) EF (onState) EF (LightIntensityState) 21 IE2011, Nottingham UK Formal Verification
    • Experimental Results UCTL Model Checker Dog2.1 standard device classes Device classes verified: 11 Number of verifies properties: 114  Some design errors found and corrected CPU time: < 1 sec / property Formally validated device statechart library in Dog2.1 22 IE2011, Nottingham UK Formal Verification
    • Conclusions Engineering the Design Process for Intelligent Environments Formalisms and tools are needed Ontologies, Statecharts, Temporal Logics http://elite.polito.it http://domoticdog.sourceforge.net fulvio.corno@polito.it 23 IE2011, Nottingham UK Formal Verification