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FPGA Camp - National Instruments Presentation

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  • 1. Integrated Platforms
  • 2. Agenda • About National Instruments • Integrated Software Platform • Standardized Hardware Interfaces – PXI – cRIO
  • 3. National Instruments Overview • Direct Operations in 40 Countries • More Than 1,000 Products, 3,900 Employees, and 600 Alliance Program Members • Corporate Headquarters in Austin, Texas Direct Sales Offices Distributors
  • 4. National Instruments India • Established in the year 1998 • Headquartered in Bangalore • Established R&D unit (Bangalore) in the year 2004 • Amongst the fastest growing NI branches, worldwide • Top brand recall in Test, Embedded & Measurement space, in India EFY Award twice for Design and Simulation Software for NI LabVIEW
  • 5. Integrated Software Platforms LabVIEW
  • 6. Graphical Development Environment • Compiled graphical development environment • Similar to flowcharting • Development time reduction of 4 to 10X
  • 7. Customization but Made Easy Integration NI Toolkit Custom IP (from 3rd –parties/ partners) Application Development Environments (LabVIEW, LabVIEW FPGA, Measurement Studio for VC++ & VB) PXI Express Bus (4 GB/s + Timing and Synchronization) NI FPGA Custom Module Module Processor/s Host Processor Conditioning Custom I/O
  • 8. Customizable Off-the-Shelf Hardware with LabVIEW FPGA and Reconfigurable I/O •Create custom I/O without knowledge of hardware design or VHDL •Easily integrate with other I/O •Simple interface to existing VHDL or Verilog
  • 9. LabVIEW Everywhere Sensor Embedded (FPGA) Handheld Wireless Networked I/O PC Boards Industrial Computer (PXI) Tektronix Open Windows Oscilloscopes Windows, Mac, Linux, Sun Workstation
  • 10. NI LabVIEW FPGA Module Host Interface VI ` FPGA VI
  • 11. Compiling G for a FPGA VI VHDL Synthesis LabVIEW FPGA Xilinx Compilation BitStream 1001100011100110001110011 0001110011000111001100011 1001100011100110001110011 0001110011000111001100011 10011000111001100011
  • 12. Component Level IP (CLIP) • Allows instantiation of any HDL IP on LabVIEW FPGA targets • No LabVIEW diagram dataflow restrictions • HDL can run in multiple clock domains • CLIP can interface to the LabVIEW FPGA code • Exposes to the user the full capability of the underlying FPGA technology FPGA Custom HDL CLIP Soft LabVIEW FPGA VI I/O Processors CLIP Xilinx IP Cores
  • 13. Unified Environment for Multiple Platforms
  • 14. Product Platforms PXI
  • 15. Hardware Customization Front-end RF Interface ADC/ DAC FPGA Processor Host Processor Backplane Power NI RF Up/ NI Adapter IFRIO Amplifier Downconverter Module PXI Express Low Noise Integrated IO FlexRIO Controller Amplifier Custom Adapter . PXI Express Switching Custom Up/ Module . Backplane Downconverter . Filters FPGA Processor
  • 16. PXI Combines Standard Technologies PXI backplane PXI controller •Bus Technology •OS Technology Chassis •Timing •ADEs •Synchronization Peripheral Slots
  • 17. NI FlexRIO System Architecture Host PC PXI NI FlexRIO Adapter Module NI FlexRIO FPGA Module PXI Platform • Interchangeable I/O • Virtex-5 FPGA • Synchronization • Customizable by users • 132 digital I/O lines • Clocking/triggers • Adapter MDK • 128 MB of DDR2 DRAM • Power/cooling • Data streaming
  • 18. Custom I/O with Standardized Interfaces • Third-party adapter modules • Custom-design integration services Module #1 of FlexRIO for Test
  • 19. NI FlexRIO Adapter Module • Defined Interface • Defined Driver support for FPGA lines • Defines I/O for NI LabVIEW FPGA • Self identification • Custom connectivity • Adapter Module Development Kit Module #1 of FlexRIO for Test
  • 20. Custom Module Development Xilinx Virtex-5 FPGA CLIP CLIP … CLIP Socketed CLIP PXI Bus Custom Front End LabVIEW FPGA VI Socketed CLIP Socketed CLIP DRAM DRAM Memory Memory Module #1 of FlexRIO for Test
  • 21. Product Platforms Compact RIO
  • 22. CompactRIO Reconfigurable Embedded System Reconfigurable FPGA Circuitry Extreme Durability Custom hardware reliability, optimization -40 to 70 °C temperature range Flexible timing, triggering, synchronization 50 G shock, Industrial certifications 179.6 mm (7.07 in) Real-Time OS 200 MHz Pentium Class Reliable embedded control, analysis, and logging 88.1 mm (3.47 in) Isolated Industrial I/O Signal conditioning for ±80 mV to ±250 V Small Size, Low Power Consumption Junction box integrated into module 179.6 x 88.1 mm (7.07 x 3.47 in) 11 to 30 VDC power, 17 W max (7-10 W typ.)
  • 23. NI CompactRIO Embedded System Architecture RIO FPGA I/O I/O Real-Time Processor I/O I/O Real-Time Controller I/O I/O I/O I/O I/O Signal Modules Connectivity Conditioning ADC • DC power with redundant supply inputs • 50 G shock • -40 to 70 C temperature
  • 24. CompactRIO Software Integration • Single development environment • Now you can use the power of industry standard LabVIEW to design NI RIO™ FPGA hardware using intuitive graphical programming. FPGA VI Host VI
  • 25. The Long Tail Opportunities
  • 26. Thank You