Chipdesign in LabVIEW<br />Vincent Claes (XIOS Hogeschool Limburg)<br />
Contents<br />System On chip design withLabVIEW<br />FPGA<br />Xilinx Spartan 3E<br />LabVIEW FPGA for Spartan3E<br />Syst...
Logic Block<br />I/O Block<br />FPGA<br />Interconnection Resources<br />Vincent Claes<br />
FPGA Development tools<br />VHDL / Verilog<br />SystemC<br />Xilinx System Generator (Matlab / Simulink)<br />LabVIEW<br /...
Spartan 3E Starter Kit<br />Xilinx status: “Sold Out”<br />Vincent Claes<br />
Spartan 3E XC3S500E<br />Vincent Claes<br />
LabVIEW FPGA for Spartan3E<br />IP Generator<br />Wizard to generateLabVIEW FPGA code<br />CLIP<br />Implement VHDL code i...
System On Chip<br />All ourintellegence in one chip<br />Softcore processors<br />Picoblaze (8-bit)<br />Microblaze (32-bi...
SoC: Softcoreimplementation<br />Xilinx picoblaze 8-bit processor<br />Vincent Claes<br />
SoCMulticoreimplementation<br />Picoblaze 2<br />Picoblaze 1<br />LabVIEW FPGA<br />Code<br />I / O<br />I /O<br />Picobla...
NoCimplementation<br />LabVIEW FPGA<br />Code<br />Picoblaze 2<br />Picoblaze 1<br />I /O<br />NoCRouter<br />I / O<br />N...
Future<br />We want LabVIEW to support all Xilinx FPGA’s (alsonot NI boards)!<br />LabVIEW Microprocessor SDK targettingMi...
About XIOS Hogeschool Limburg<br />XIOS Hogeschool Limburg is thefirstLabVIEWacademy in benelux<br />FPDA – 1 Research pro...
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Graphical System On Chip with LabVIEW

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Graphical System On Chip with LabVIEW

  1. 1. Chipdesign in LabVIEW<br />Vincent Claes (XIOS Hogeschool Limburg)<br />
  2. 2. Contents<br />System On chip design withLabVIEW<br />FPGA<br />Xilinx Spartan 3E<br />LabVIEW FPGA for Spartan3E<br />System On Chip<br />Softcore<br />Multicoreimplementations<br />NoC: Network-On-Chip<br />Vincent Claes<br />
  3. 3. Logic Block<br />I/O Block<br />FPGA<br />Interconnection Resources<br />Vincent Claes<br />
  4. 4. FPGA Development tools<br />VHDL / Verilog<br />SystemC<br />Xilinx System Generator (Matlab / Simulink)<br />LabVIEW<br />Vincent Claes<br />
  5. 5. Spartan 3E Starter Kit<br />Xilinx status: “Sold Out”<br />Vincent Claes<br />
  6. 6. Spartan 3E XC3S500E<br />Vincent Claes<br />
  7. 7. LabVIEW FPGA for Spartan3E<br />IP Generator<br />Wizard to generateLabVIEW FPGA code<br />CLIP<br />Implement VHDL code in LabVIEW FPGA<br />Integrate IP fromopencores.org,… <br />Vincent Claes<br />
  8. 8. System On Chip<br />All ourintellegence in one chip<br />Softcore processors<br />Picoblaze (8-bit)<br />Microblaze (32-bit)  programmable in LabVIEW Microprocessor SDK?<br />IP (UART controller, VGA controller, JPEG2000,…)<br />Vincent Claes<br />
  9. 9. SoC: Softcoreimplementation<br />Xilinx picoblaze 8-bit processor<br />Vincent Claes<br />
  10. 10. SoCMulticoreimplementation<br />Picoblaze 2<br />Picoblaze 1<br />LabVIEW FPGA<br />Code<br />I / O<br />I /O<br />Picoblazeprogrammed in assembler<br />Importedby CLIP Node<br />IP Softcores<br />Network-On-Chip<br />Vincent Claes<br />
  11. 11. NoCimplementation<br />LabVIEW FPGA<br />Code<br />Picoblaze 2<br />Picoblaze 1<br />I /O<br />NoCRouter<br />I / O<br />NoCRouter<br />Picoblazeprogrammed in assembler<br />Importedby CLIP Node<br />IP Softcores<br />Network-On-Chip (createdLabVIEW code from IMEC NoCrouter model)<br />Vincent Claes<br />
  12. 12. Future<br />We want LabVIEW to support all Xilinx FPGA’s (alsonot NI boards)!<br />LabVIEW Microprocessor SDK targettingMicroblazeSoftcoreon Spartan3E FPGA<br />Microblazeintegratedusing CLIP node<br />NI Labs<br />Tool forPhysicalmapping (layout) to FPGA<br />Use DSP slices in some Xilinx FPGA’s<br />Vincent Claes<br />
  13. 13. About XIOS Hogeschool Limburg<br />XIOS Hogeschool Limburg is thefirstLabVIEWacademy in benelux<br />FPDA – 1 Research project<br />FPDA – 2 Research project<br />http://pwo.fpga.be<br />http://www.xios.be<br />Vincent Claes<br />

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