F inal year projects list vlsi
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F inal year projects list vlsi F inal year projects list vlsi Document Transcript

  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   About Us : We at Ensemble Technologies specialize in electronic design and manufacturing services for various industrial segments. We also offer student project guidance and training for final year projects in departments like ECE, EEE, E&I and other associated departments. We have a impeccable track record over the last ten years, during which we have guided thousands of projects in various domains like  Embedded Systems Projects  VLSI Projects  DSP Projects  DIP Projects  MATLAB Projects  Electrical Projects  Instrumentation Projects  Robotics Projects …and many more related domains. Most of these projects are based on latest international publications like IEEE papers. We hand pick IEEE projects for students to meet their requirements.About This List : This projects list is a partial list, taken from our full projects list for the year 2011-12. Most of the projects on the list are based on IEEE base papers for 2011-12. This list is only to give the students a brief idea about the possibilities with a specific technology. We have 100s of other projects in various other domains also. Students can choose either from this list or contact us to get more project options.Contact Us : Website : www.ensemble-tech.com Email : projects@ensemble-tech.com Mobile : +91 9790005746 Landline: 044-28552311 / 42663268 Address: 4th Floor, ABC Trade center, 50, Mount Road, Near Devi Theater Complex, Chennai – 600002. Projects List 2011-12 www.ensemble-tech.com Page 1 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   S.No FPGA / VLSI Code 1 Low-Power And Area-Efficient Carry Select Adder EVLS1 2 Digital Image Authentication From JPEG Headers EVLS2 3 Building An AMBA AHB Compliant Memory Controller EVLS3 A Robust FSM Watermarking Scheme For IP Protection Of Sequential Circuit 4 EVLS4 Design. 5 Design Of Sequential Elements For Low Power Clocking System. EVLS5 6 Innovative Application Of RFID Systems To Special Education Schools EVLS6 Field Programmable Gate Array Prototyping Of End-Around Carry Parallel Prefix 7 EVLS7 Tree Architectures. 8 A New Reversible Design Of BCD Adder EVLS8 9 Efficient Pattern Matching Algorithm For Memory Architecture EVLS9 The Realization Of Precision Agriculture Monitoring System Based On Wireless 10 EVLS10 Sensor Network Bus Matrix Synthesis Based On Steiner Graphs For Power Efficient System-On- 11 EVLS11 Chip Communications 12 New Architectural Design Of CA-Based Codec. EVLS12 13 An Autonomous Vectorscalar Floating Point Coprocessor For FPGAs EVLS13 14 Adiabatic Technique For Energy Efficient Logic Circuits Design EVLS14 15 4 Bit SQF Multiplier Based On Booth Encoder EVLS15 A Low-Power And Portable Spread Spectrum Clock Generator For SOC 16 EVLS16 Applications Period Extension And Randomness Enhancement Using High-Throughput 17 EVLS17 Reseeding-Mixing Prng. Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable 18 EVLS18 Architectures Projects List 2011-12 www.ensemble-tech.com Page 2 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   19 The Communication Interface Design Of AT89C51 EVLS19 Area-Efficient Scalable Map Processor Design For High-Throughput20 EVLS20 Multistandard Convolutional Turbo Decoding21 A Design Of Network Remote Control System EVLS21 Efficient Codec Designs For Crosstalk Avoidance Codes Based On Numeral22 EVLS22 Systems23 Blind Spectrum Sensing For OFDM-Based Cognitive Radio Systems EVLS2324 Design And Characterization Of Parallel Prefix Adders Using FPGAs EVLS2425 Low-Power And Area-Efficient Carry Select Adder EVLS2526 Preparation Robot Based On Serial EVLS26 Peak Power Analysis Of MC-CDMA Employing Golay Complementary27 EVLS27 Sequences28 A Distributed Canny Edge Detector And Its Implementation On FPGA EVLS2829 An FPGA-Based Architecture For Linear And Morphological Image Filtering EVLS2930 FPGA Based Real-Time Adaptive Fuzzy Logic Controller EVLS3031 Design Of Low Power And High Speed Configurable Booth Multiplier EVLS31 Dual Stack Method A Novel Approach To Low Leakage And Speed Power32 EVLS32 Product Vlsi Design Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable33 EVLS33 Architectures.34 MasliNET: A Wireless Sensor Network Based Environmental Monitoring System EVLS3435 On Profibus-DP Slave Station Controller Based On NIOS II EVLS3536 An Efficient Architecture Design For VGA Monitor Controller EVLS36 IEEE 1451-Based Multi-Interface Module (I2M) For Industrial Processes37 EVLS37 Automation Projects List 2011-12 www.ensemble-tech.com Page 3 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   38 Design And Implementation Of Cordic Processor For Complex DPLL EVLS3839 High-Accuracy Fixed-Width Modified Booth Multipliers For Lossy Applications EVLS39 Efficient Iterative Techniques For Soft Decision Decoding Of Reed-Solomon40 EVLS40 Codes Design And Sensitivity Analysis Of A New Current-Mode Sense Amplifier For41 EVLS41 Low-Power SRAM42 An Implementation Of A 2D FIR Filter Using The Signed-Digit Number System EVLS42 A Novel Low Power And High Speed Wallace Tree Multiplier For RISC43 EVLS43 Processor44 Hardware Realization Of Shadow Detection Algorithm In FPGA EVLS4445 Fixed-State Tests For Delay Faults In Scan Designs EVLS45 Design Of An Error Detection And Data Recovery Architecture For Motion46 EVLS46 Estimation Testing Applications.47 Image Encryption Based On AES Key Expansion EVLS4748 Digital Watermarking Using Bidimensional Empirical Mode Decomposition EVLS48 Efficient Weighted Modulo 2N+1 Adders By Partitioned Parallel-Prefix49 EVLS49 Computation And Enhanced Circular Carry Generation An Ultra-Low-Power BPSK Receiver And Demodulator Based On Injection-50 EVLS50 Locked Oscillators51 High Speed ASIC Design Of Complex Multiplier Using Vedic Mathematics EVLS5152 Fuzzy Random Impulse Noise Removal From Color Image Sequences EVLS5253 A Flexible Hardware Implementation Of SHA-1 And SHA-2 Hash Functions EVLS5354 PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration EVLS54 Effect Of Carrier Frequency Offset On Single-Carrier CDMA With Frequency-55 EVLS55 Domain Equalization Implementation Of A Self-Motivated Arbitration Scheme For The Multilayer AHB56 EVLS56 Bus Matrix. Projects List 2011-12 www.ensemble-tech.com Page 4 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   57 On The Transmission Method For Short Range MIMO Communications EVLS5758 Enhancing Learning Of Digital Systems Using A Remote FPGA Lab EVLS5859 Operation Improvement Of Indoor Robot By Gesture Recognition EVLS59 New Approach To Look-Up-Table Design And Memory-Based Realization Of60 EVLS60 FIR Digital Filter.61 A Low-Power Single-Phase Clock Multiband Flexible Divider. EVLS6162 A Median Filter FPGA With Harvard Architecture EVLS6263 An Efficient 4-D 8PSK TCM Decoder Architecture EVLS63 A Lightweight High-Performance Fault Detection Scheme For The Advanced64 EVLS64 Encryption Standard Using Composite Fields65 Performance Analysis Of Integer Wavelet Transform For Image Compression EVLS65 An Enhanced Canary-Based System With BIST For SRAM Standby Power66 EVLS66 Reduction67 FPGA Implementation Of RS232 To Universal Serial Bus Converter EVLS67 Performance Efficient FPGA Implementation Of Parallel 2-D MRI Image Filtering68 EVLS68 Algorithms Using Xilinx System Generator69 Mobile Video Monitoring System Based On FPGA & GPRS EVLS69 Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear70 EVLS70 Approximation71 Algorithm Of Binary Image Labeling And Parameter Extracting Based On FPGA EVLS7172 Power Management Of MIMO Network Interfaces On Mobile Systems EVLS72 An On-Chip Delay Measurement Technique Using Signature Registers For73 EVLS73 Small-Delay Defect Detection.74 LUT Optimization For Memory-Based Computation. EVLS7475 Detecting Background Setting For Dynamic Scene EVLS75 Projects List 2011-12 www.ensemble-tech.com Page 5 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical    Low-Complexity Sequential Searcher For Robust Symbol Synchronization In76 EVLS76 OFDM Systems77 Recognition FPGA System For Detection Of Anomalies In Mammograms EVLS77 Low Complexity Digit Serial Systolic Montgomery Multipliers For Special Class78 EVLS78 Of GF(2M)79 High-Accuracy Fixed-Width Modified Booth Multipliers For Lossy Applications EVLS79 Improved Area-Efficient Weighted Modulo 2N + 1 Adder Design With Simple80 EVLS80 Correction Schemes. High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder81 EVLS81 Tree Design And VLSI Implementation Of High-Performance Face-Detection Engine82 EVLS82 For Mobile Applications83 A New Adaptive Weight Algorithm For Salt And Pepper Noise Removal EVLS83 A Rotation-Based Bist With Self-Feedback Logic To Achieve Complete Fault84 EVLS84 Coverage Power-Aware Design With Various Low-Power Algorithms For An H.264/AVC85 EVLS85 Encoder Low Power Chien Search For BCH Decoder Using RT-Level Power86 EVLS86 Management87 Design And Implementation Of Area-Optimized AES Based On FPGA EVLS8788 Solid Waste Monitoring And Management Using RFID, GIS And GSM EVLS88 A Robust Edge Encoding Technique For Energy-Efficient Multi-Cycle89 EVLS89 Interconnect90 Lossless Implementation Of Daubechies 8-Tap Wavelet Transform EVLS90 A Probabilistic Estimation Bias Circuit For Fixed-Width Booth Multiplier And Its91 EVLS91 DCT Applications92 Sort Optimization Algorithm Of Median Filtering Based On FPGA EVLS9293 On Reducing Scan Shift Activity At RTL EVLS93 Design And Implementation Of Low Power Digital FIR Filter Based On Low94 EVLS94 Power Multipliers And Adders On Xilinx FPGA Projects List 2011-12 www.ensemble-tech.com Page 6 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   95 On Reducing Hidden Redundant Memory Accesses For DSP Applications EVLS95 Automatic Road Extraction Using High Resolution Satellite Images Based On96 EVLS96 Level Set And Mean Shift Methods PDE-Based Random-Valued Impulse Noise Removal Based On New Class Of97 EVLS97 Controlling Functions98 Design Of SHA-1 Algorithm Based On FPGA EVLS98 Implementation And Performance Analysis Of Seal Encryption On FPGA, GPU99 EVLS99 And Multi-Core Processors Design Space Exploration Of Hard-Decision Viterbi Decoding: Algorithm And100 EVLS100 VLSI Implementation. A Lightweight High-Performance Fault Detection Scheme For The Advanced101 EVLS101 Encryption Standard Using Composite Fields102 Accumulator Based 3-Weight Pattern Generation(Testing) EVLS102 A Secure Field Programmable Gate Array Based System-On-Chip For103 EVLS103 Telemedicine Application A Formal Approach To Designing Cryptographic Processors Based On GF(2^M)104 EVLS104 Arithmetic Circuits105 FPGA Design Of AES Core Architecture For Portable Hard Disk EVLS105106 Design Of A Low Power Flip-Flop Using CMOS Deep Submicron Technology EVLS106 Removal Of High Density Salt And Pepper Noise Through Modified Decision107 EVLS107 Based Unsymmetric Trimmed Median Filter Design And FPGA Implementation Of Modified Distributive Arithmetic Based108 EVLS108 DWT-IDWT Processor For Image Compression109 FPGA Based FFT Algorithm Implementation In WiMAX Communications System EVLS109110 FPGA Implementation For Humidity And Temperature Remote Sensing System EVLS110 Face Detection And Recognition Method Based On Skin Color And Depth111 EVLS111 Information112 Location Cache Design And Performance Analysis For Chip Multiprocessors EVLS112113 Single Cycle Access Structure For Logic Test EVLS113 Projects List 2011-12 www.ensemble-tech.com Page 7 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical    Systematic Design Of RSA Processors Based On High-Radix Montgomery114 EVLS114 Multipliers Effective Hybrid Test Program Development For Software-Based Self-Testing Of115 EVLS115 Pipeline Processor Cores116 An FPGA-Based Architecture For Linear And Morphological Image Filtering EVLS116 Modeling TCP/IP Stack In A Single Custom Processor, With Secure Data117 EVLS117 Transmission To An Altera-Based Web Server Implementing A Safe Embedded Computing System In Sram-Based FPGAs118 EVLS118 Using IP Cores: A Case Study Based On The Altera NIOS-II Soft Processor119 RFID-Based Hospital Real-Time Patient Management System EVLS119120 A Multibank Memory-Based VLSI Architecture Of DVB Symbol Deinterleaver EVLS120121 Design And Simulation Of UART Serial Communication Module Based On VHDL EVLS121122 Task Migration In Mesh NOCS Over Virtual Point-To-Point Connections EVLS122 A Review On Power Optimization Of Linear Feedback Shift Register (LFSR) For123 EVLS123 Low Power Built In Self Test (BIST)124 Cyclic Prefixed OQAM-OFDM And Its Application To Single-Carrier FDMA EVLS124 Embedded Web Server For Remote Laboratory Access For Undergraduate125 EVLS125 Students Studying Electronic Engineering126 Pseudorandom Bit Generation Using Coupled Congruential Generators. EVLS126127 An Efficient Implementation Of Floating Point Multiplier EVLS127128 High-Speed Low-Power Viterbi Decoder Design For TCM Decoders EVLS128129 A Very Fast And Low Power Carry Select Adder Circuit EVLS129 Development Of A New Breath Alcohol Detector Without Mouthpiece To Prevent130 EVLS130 Alcohol-Impaired Driving131 The Design Of The Displaying System Based On The SOPC Embedded Chips EVLS131132 High Speed ASIC Design Of Complex Multiplier Using Vedic Mathematics EVLS132 Projects List 2011-12 www.ensemble-tech.com Page 8 of 9 © Ensemble Technologies – 2011 - All Rights Reserved
  • Phone : 044‐28552311  Mobile : +91 9790005746  Email : projects@ensemble-tech.com Website : www.ensemble-tech.com Address : ABC Trade Center, 50, Mount Road, Near  Devi Theater, Chennai‐2  IEEE Projects in ‐ Embedded Systems | VLSI | DSP | DIP | Inst | MATLAB | Electrical   133 The Design Of The Emperature And Humidity Supervisory Monitor System EVLS133 Technique Of LFSR Based Test Generator Synthesis For Deterministic And134 EVLS134 Pseudorandom Testing135 Ultra Low-Power Clocking Scheme Using Energy Recovery And Clock Gating EVLS135136 Design And Characterization Of Parallel Prefix Adders Using FPGAs EVLS136 Runtime Resonance Noise Reduction With Current Prediction Enabled137 EVLS137 Frequency Actuator138 Adaptive OFDM Radar For Target Detection In Multipath Scenarios EVLS138 A Pipeline VLSI Architecture For High-Speed Computation Of The 1-D Discrete139 EVLS139 Wavelet Transform140 A Blind Digital Watermarking Algorithm Based On Wavelet Transform EVLS140 High-Throughput Interpolator Architecture For Low-Complexity Chase Decoding141 EVLS141 Of RS Codes.142 Image Edge Detection Based On FPGA EVLS142 Projects List 2011-12 www.ensemble-tech.com Page 9 of 9 © Ensemble Technologies – 2011 - All Rights Reserved