Cache Algorithms Overview

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    Cache Algorithms Overview - Presentation Transcript

    1. Cache Algorithms Ilya Lintsbah, Symmetrix Performance Research Group, intern © Copyright 2009 EMC Corporation. All rights reserved. 1
    2. Symmetrix Symmetrix is an enterprise storage array Symmetrix DMX-4 characteristics: – Up to 1920 drives – Each drive capacity up to 1Tb – Up to 512 GB cache memory © Copyright 2009 EMC Corporation. All rights reserved. 2
    3. Cache Disk array Cache hit Cache Cache miss Cache hit – cache contains the requested page Cache miss – cache doesn’t contain the requested page, page should be fetched from disk array Hit rate is the percentage of requests that result in cache hits © Copyright 2009 EMC Corporation. All rights reserved. 3
    4. Cache Replacement Policies Request that result as cache hit is processed much faster than request that result as cache miss When cache miss happens, we need to put a requested page to cache If cache is full we should at first discard some page from cache Cache replacement policy decides which page should be discarded in this situation Performance of cache replacement policy can be measured in hit rate © Copyright 2009 EMC Corporation. All rights reserved. 4
    5. Offline Optimal Replacement Policy Offline replacement policy knows future information MIN algorithm replaces the page that has the greatest forward distance It is an optimal replacement policy in terms of hit rate, but it can’t be used for page replacement MIN provides an upper bound on the achievable hit rate by any on-line policy © Copyright 2009 EMC Corporation. All rights reserved. 5
    6. Basic Cache Replacement Policies MRU LRU LRU Least Recently Used item is discarded Simple to implement as a bidirectional list On a cache hit referenced page is moved to MRU position LFU Least Frequently Used item is discarded Counts number of requests for each track Disadvantage: LFU accumulates stale pages with high frequency counts that may no longer be useful © Copyright 2009 EMC Corporation. All rights reserved. 6
    7. LRFU and FBR LRFU Item with the least recency/frequency value is discarded A spectrum of policies that subsumes the LRU, LFU and intermediate policies FBR Cache is divided into three parts, each page has a reference count Factoring out locality: page reference count is increased only if this page is referenced, when it is in Middle or Old sections Page with least reference count from old section is replaced MRU LRU New Middle Old Section Section Section © Copyright 2009 EMC Corporation. All rights reserved. 7
    8. ARC Algorithm ARC contains two LRU lists: L1 and L2 L1 contains pages that were referenced only once L1 L2 recently L2 contains pages that were referenced at least twice T1 recently T2 Each list is divided into two parts: top and bottom B1 B2 B1 and B2 are used as history, they are not stored in cache. They are called “ghost caches” Real cache consists of T1 and T2 Ghost caches T1 and T2 compete with each other for size © Copyright 2009 EMC Corporation. All rights reserved. 8
    9. ARC Adaptation History is used to change sizes of T1 and T2 dynamically L1 L2 Hits in history change the target size of T1 (p) If there is a hit in B1, p is increased T1 T2 If there is a hit in B2, p is decreased B1 On a cache miss: B2 – If |T1| > p, LRU page from T1 is replaced – Else LRU page from T2 is replaced Ghost caches © Copyright 2009 EMC Corporation. All rights reserved. 9
    10. ARC Advantages Long sequence of one-time-only reads will pass through L1, without flushing out possibly important pages in L2, so ARC is scan-resistant ARC has no parameters ARC is adaptive © Copyright 2009 EMC Corporation. All rights reserved. 10
    11. Simulations Trace LRU LFU FBR LRFU ARC MIN Trace 1 45.1% 31.8% 45.9% 45.6% 46.7% 54.5% Trace 2 72.7% 26.1% 74.8% 72.7% 73.1% 82.7% Trace 3 72.4% 26.7% 74.7% 72.4% 72.1% 82.2% Trace 4 50.4% 19.2% 50.7% 50.4% 51.1% 60.8% Trace 5 39.6% 13.9% 41.1% 39.6% 40.0% 55.3% Trace 6 81.7% 63.1% 82.8% 82.1% 83.2% 90.1% Trace 7 78.5% 46.8% 78.6% 78.6% 78.6% 83.7% Trace 8 60.7% 21.7% 63.6% 60.6% 60.1% 70.7% Trace 9 85.4% 70.5% 85.9% 85.4% 85.4% 90.1% Trace 10 67.5% 60.7% 69.7% 67.5% 69.2% 79.9% Cache size 64 Gb © Copyright 2009 EMC Corporation. All rights reserved. 11
    12. ARC Modifications ARC is announced to outperform LRU, but on Symmetrix traces they both do rather similar hit rate One of the reasons of that is that more tracks then needed are moved to second list We propose two solutions for this problem: ARCM1 and ARCM2 © Copyright 2009 EMC Corporation. All rights reserved. 12
    13. Relative Improvement 1 To compare algorithms with LRU the following characteristic could be used: 0.9 Hit ratio(Alg) − Hit ratio(LRU) 0.8 Relative Improvement = Hit ratio(MIN) − Hit ratio(LRU) 0.7 0.6 Relative improvement shows the improvement offered by algorithm over LRU as a fraction of the difference 0.5 between MIN and LRU 0.4 If algorithm performance is worse than LRU the relative improvement is negative 0.3 LRU Alg MIN Example: 0.2 – Hit Ratio(LRU) = 0.6 – Hit Ratio(MIN) = 0.7 0.1 – Hit Ratio(Alg) = 0.64 – Rel.Improvement(Alg) = (0.64-0.6)/(0.7-0.6) = 0.4 0 1 © Copyright 2009 EMC Corporation. All rights reserved. 13
    14. Results: Relative Improvement Relative improvement over LRU 50,0% 40,0% 30,0% Rel. improvement 20,0% 10,0% 0,0% Trace 1 Trace 3 Trace 5 Trace 6 Trace 7 Trace 8 Trace 9 Trace 10 -10,0% Traces ARCM1 ARCM2 ARC © Copyright 2009 EMC Corporation. All rights reserved. 14

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