PI2EQX4401/02 PCI Express ReDriver

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Introduction of the signal conditioning devices

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  • Welcome to the training module on PERICOM PI2EQX4401/02 PCI Express ReDriver. This training module introduces the signal conditioning devices which are called ReDriver for GEN 1 and GEN 2 PCI EXPRESS.
  • The PCI Express bus can be thought of as a 'high-speed serial replacement' of the older (parallel) PCI/PCI-X bus. In terms of bus-protocol, PCIe communication is encapsulated in packets. The work of packetizing and depacketizing data and status-message traffic is handled by the transaction-layer of the PCIe port. PCIe devices communicate via a logical connection called a link. A link is a point-to-point communication channel between 2 PCIe ports. At the physical level, a link is composed of 1 or more lanes. Conceptually, the lane is a full-duplex byte-stream, transporting packets containing the data in 8 bit 'byte' format. Lane counts are written with an " x " prefix and x16 is the largest size in common use
  • High-speed differential signal interfaces dominate today’s high-performance system architectures because of their ultra high data rate throughput, low power consumption, facilitation of PCB layout, and PCB cost reduction. The challenge is that at the bandwidth of 2.5Gbps to 3.2Gbps, the differential signals are tremendously attenuated and distorted when traveling through a long trace or cable. Different approaches to extend a trace or cable include using a PCI Express Bridge or a Packet Switch, or by using the PI2EQX Re-Driver family. However, a PCI Express Bridge or a PCI Express Packet Switch will cost much more than using the PI2EQX family, and the extended functions in the PCI Express Bridge or Packet Switch may not be fully used if the application is only for trace and cable extension.
  • The PI2EQX44 family was developed using Pericom’s cuttingedge technology to boost the high-speed differential signals traveling in traces or cables in high-performance system interface protocols - PCI Express, Fibre Channel, Rapid I/O at 2.5Gbps. The PI2EQX44 family has flexible and programmable settings for its equalization, de-emphasis and switch to fit various lengths of trace and cable. The integrated equalization circuitry provides flexibility with signal integrity of the PCI-express signal before the re-driver. Whereas the integrated de-emphasis circuitry provides flexibility with signal integrity of the PCI-express signal after the Re-Driver.
  • Here shows the internal block diagram of the PI2EQX44 family ReDriver. A low-level input signal detection and output squelch function is provided for all channels. Each channel operates fully independantly. When a channel is enabled (EN_x=1) and operating, that channel input signal level (on xl+/-) determines whether the output is enabled. If the input level of the channel falls below the active threshold level (Vth-) then the output driver switches off, and the pin is pulled to VDD via a high impedance resistor. In addition to providing signal re-conditioning, the PI2EQX44xx re-drivers also provide power management Stand-by mode operated by an Enable pin. A differential clock buffer is provided for test and other system requirements. This clock function is not used by the data channels.
  • Figure 1 is the configuration of the PI2EQX4401/02 test board which has variety trace lengths from 1.9” to 40” at input and output for the signal integrity test. The Agilent N4902B acts as signal source to provide high speed differential signal. Figure 2 and figure 3 are the result of 35” input trace and 1.9” output trace tested on the test board. Figure 2 shows the messy input eyes measured at TP1 and TP2. However the signals are recovered at the output of the PI2EQX4401/02 because of the 7.5db equalization in the input of PI2EQX4401/02.
  • Here is an example for using PI2EQX4401 for signal re-conditioning in the notebook and docking station. The PCI Express signal at the PCI Express x1 connector in the docking station will become weak and fail the compliance test after the signal traveling the long trace between U1 and the PCI Express x1 connector. The PI2EQX4401 in the docking station re-conditions the signal from U1 to meet the PCI Express compliance test on the PCI Express x1 connector.
  • Here is the example for using the PI2EQX4402 for the SAN (Storage Area Network) redundancy application. The two SAN redundancy cards with 4 lanes PCI Express interface are 35” away from each other and the two PI2EQX4402 chips U2 and U3 are deployed at the input of PCI Express chipsets U1 and U4. Thus, the equalization in the input of the PI2EQX4402 will correct the re-conditioning of the messy deterministic jitters at the input of the PI2EQX4402 and the output of the PI2EQX4402 will become clear and pass the PCI Express compliance test.
  • In this example, the systems A and B are using a high-speed differential cable, 3 meter to 7 meter, for PCI Express interface. The PI2EQX4402 chips U2, U3, U6 and U7 will guarantee that the signals at the input of the U1 and U10 will pass the PCI Express compliance test.
  • In the Figure, the PCI Express x8 systems A and B are using CAT-5 (or CAT-6) cables, 2 meter to 5 meter depending on the quality of the cables, while guarantee passing the PCI Express compliance test at the input of the U1 and U10. This combining of PI2EQX4402 and CAT-5 cable will provide an optimized cost reduction solution for cable applications.
  • Thank you for taking the time to view this presentation on “ PI2EQX4401/02 PCI Express ReDriver” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Pericom site – link shown – or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.
  • PI2EQX4401/02 PCI Express ReDriver

    1. 1. PI2EQX4401/02 PCI Express ReDriver <ul><li>Source: PERICOM </li></ul>
    2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>This training module introduces the signal conditioning devices which are called ReDriver for GEN 1 and GEN 2 PCI EXPRESS. </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>PCIe basics </li></ul></ul><ul><ul><li>Overview of PI2EQX4401/02 ReDriver </li></ul></ul><ul><ul><li>Applications </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>12 pages </li></ul></ul>
    3. 3. PCI Express Basics <ul><li>PCI Express (PCIe) is designed to replace the older PCI, PCI-X, and AGP standards. </li></ul><ul><li>PCI Express is used in consumer, server, and industrial applications. </li></ul><ul><li>Serial interconnect @ 2.5Gb/S </li></ul><ul><ul><li>PCI transactions are packetized and then serialized </li></ul></ul><ul><ul><li>LVDS Signalling, point-to-point, 8B/10B encoded </li></ul></ul><ul><ul><li>Bandwidth is available PER slot, and in BOTH directions </li></ul></ul><ul><ul><li>X1 gives real-world performance of 200MByts/S per direction </li></ul></ul><ul><ul><li>X16 gives real-world performance of 3.2GBytes/S per direction </li></ul></ul>Source from www.wikipedia.org
    4. 4. Beating the Distance Challenge <ul><li>At the bandwidth of 2.5Gbps to 3.2Gbps, the differential signals are tremendously attenuated and distorted when traveling through a long trace or cable. </li></ul><ul><li>Different approaches to extend a trace or cable include </li></ul><ul><ul><li>PCI Express Bridge </li></ul></ul><ul><ul><li>A Packet Switch </li></ul></ul><ul><ul><li>PI2EQX Re-Driver </li></ul></ul>Cost Design Complexity Design Cycle PCIe Bridge High High Long PCIe Packet Switch High High Long PCIe ReDriver Low Low Short
    5. 5. PI2EQX4401/02 ReDriver ™ Overview <ul><li>High-speed PCI-Express lane </li></ul><ul><li>Adjustable Transmiter De-Emphasis & Amplitude </li></ul><ul><li>Adjustable Receiver Equalization </li></ul><ul><li>One Spread Spectrum Reference Clock Buffer Output </li></ul><ul><li>Input Signal Level Detect and Output Squelch </li></ul><ul><li>100Ω Differential CML I/O’s </li></ul><ul><li>Low Power (100mW per Channel) </li></ul><ul><li>Stand-by Mode – Power Down State </li></ul><ul><li>VDD Operating Range: 1.8V ±0.1V </li></ul><ul><li>Pb-free & Green </li></ul>
    6. 6. Internal Block Diagram
    7. 7. The excellent equalization of the PI2EQX44xx Figure 1 Figure 2 Figure 3 PI2EQX44xx
    8. 8. PI2EQX4401 for signal re-conditioning in the notebook and docking station
    9. 9. PI2EQX4402 for the SAN (Storage Area Network) redundancy application
    10. 10. PIEQX4402 for high-speed differential cable between two systems A and B
    11. 11. PIEQX4402 for CAT-5 cables between two systems A and B
    12. 12. Additional Resource <ul><li>For ordering PI2EQX4401/02, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For additional inquires contact our technical service hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http://www.pericom.com/search/partIDsearch.php?partid=PI2EQX440 </li></ul></ul>Newark Farnell

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