This is a training module on the Avago Technologies optically isolated sigma-delta modulator ACPL-796J
Welcome to the training module on ACPL-796J. This training module gives you an overview introduction to features and applications of the Sigma-Delta Modulator.
The ACPL-796J is a 1-bit, second-order sigma-delta (Σ-Δ) modulator which converts an analog input signal into a high-speed data stream with galvanic isolation based on optical coupling technology. The ACPL-796J operates from a 5 V power supply with dynamic range of 80 dB with an appropriate digital filter. The differential inputs of ±200 mV (full scale ±320 mV) are ideal for direct connection to shunt resistors or other low-level signal sources in applications such as motor phase current measurement.
The ACPL-796J is ideal for use in industrial applications such as HVAC systems, conveyors, servo motors and a wide range of industrial automation applications.
The ACPL-796J is designed with digital inputs and outputs that are compatible with systems powered by 5- or 3-volt supplies and works under a wide industrial temperature range. With 0.5 mm minimum distance through insulation, the ACPL-796J provides reliable double protection and high working insulation voltage, which is suitable for fail-safe designs. Based on an advanced low power CMOS process, the ACPL-796J uses an external clock that allows synchronized data conversion between the current sensor and controller to help motor control designers eliminate complex design processes in data and clock reading. Moreover, the ACPL-796J is designed with digital inputs and outputs that are compatible with systems powered by 5- or 3-volt supplies and works under a wide industrial temperature range.
The main function of the modulator (opto coupler) is to provide galvanic isolation between the analog signal input and the digital data output. modulator delivering high noise margins and excellent immunity against isolation-mode transients. With 0.5 mm minimum distance through insulation, The analog input is continuously sampled by means of sigma-delta over-sampling using external clock, coupled across the isolation barrier, which allows synchronous operation with any digital controller. The signal information is contained in the modulator data, as a density of ones with data rate up to 20 MHz, and the data are encoded and transmitted across the isolation boundary where they are recovered and decoded into high-speed data stream of digital ones and zeros. The original signal information can be reconstructed with a digital filter. The serial interface has a wide supply range of 3 V to 5.5 V.
In this page some of the important definitions relevant to Sigma-Delta modulators have been defined. They are Integral Nonlinearity (INL), Differential Nonlinearity (DNL), Offset Error, Signal-to-Noise Ratio (SNR).
This is in continuation to the previous page here the definitions of Signal-to-(Noise + Distortion) Ratio (SNDR), Effective Number of Bits (ENOB), Isolation Transient Immunity (CMR) have been explained.
The differential analog inputs of the ACPL-796J are implemented with a fully-differential, switched-capacitor circuit. The ACPL-796J accepts signals of ±200 mV (full scale ±320 mV), which is ideal for direct connection to shunt based current sensing or other low-level signal sources applications such as motor phase current measurement. An internal voltage reference determines the full-scale analog input range of the modulator (±320 mV); an input range of ±200 mV is recommended to achieve optimal performance.
This page shows the typical performance curve of the modulator device. Input current verses input voltage and Signal-to-(Noise + Distortion) Ratio verses input voltage has been shown.
The ACPL-796J Isolated Modulator (opto coupler) uses sigma-delta modulation to convert an analog input signal into a high-speed single-bit digital data stream,the time average of the modulator’s single-bit data is directly proportional to the input signal. This evaluation board allows direct modification to the interface IC in order to achieve different levels of performance. It also has a real-time display of the converted data on the terminal screen.
A typical three-phase induction motor drive shown here first rectifies and filters the three-phase AC line voltage to obtain a high-voltage DC power supply. The output transistors then invert the DC supply voltage back into an AC signal to drive the three-phase induction motor. The motor drive commonly uses pulse-width modulation (PWM) to generate a variable voltage, variable frequency drive signal for the motor. High performance motor drives usually incorporate some form of current sensing in their design.
In the typical application circuit shown here, the ACPL-796J is connected in a single-ended input mode. Given the fully differential input structure, a differential input connection method is recommended to achieve better performance. The voltage from the current sensing resistor or shunt (RSENSE) is applied to the input of the ACPL-796J through an RC anti-aliasing filter (R2 and C2). And finally, a clock is connected to the ACPL-796J and data are connected to the digital filter. The input currents created by the switching actions on both of the pins are balanced on the filter resistors and cancelled out each other. Any noise induced on one pin will be coupled to the other pin by the capacitor C and creates only common mode noise which is rejected by the device.
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The SNDR is the measured ratio of AC signal power to noise plus distortion power at the output of the ADC.
The signal power is the RMS amplitude of the fundamental input signal.
Noise plus distortion power is the RMS sum of all non-fundamental signals up to half the sampling frequency (excluding DC).
Effective Number of Bits (ENOB)
The ENOB determines the effective resolution of an ADC, expressed in bits, defined by ENOB = (SNDR − 1.76)/6.02.
Isolation Transient Immunity (CMR)
The isolation transient immunity (also known as Common-Mode Rejection or CMR) specifies the minimum rate-of-rise/fall of a common-mode signal applied across the isolation boundary beyond which the modulator clock or data is corrupted.
Analog Input Differential input connection diagram Analog input equivalent circuit
The differential analog inputs of the ACPL-796J are implemented with a fully-differential, switched-capacitor circuit.
The ACPL-796J accepts signal of ±200 mV (full scale ±320 mV), which is ideal for direct connection to shunt based current sensing.
An internal voltage reference determines the full-scale analog input range of the modulator (±320 mV).
Typical Performance Plots Input current vs. input voltage. SNDR vs. input voltage VIN. TA = 25°C, VDD1 = 5 V, VDD2 = 5 V, VIN+ = –200 mV to +200 mV, and VIN– = 0 V, Fmclkin = 10 MHz, with Sinc3 filter, 256 decimation ratio.