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LM49450: Stereo Audio Subsystem

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An Overview Study of I2S Input, 2.5 W Channel, Low EMI, Stereo, Class D Audio Sub-System: LM49450 …

An Overview Study of I2S Input, 2.5 W Channel, Low EMI, Stereo, Class D Audio Sub-System: LM49450

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  • Welcome to the training module on National Semiconductor LM49450: Stereo Audio Subsystem.
  • This training module provides an overview study of I 2 S Input, 2.5 W Channel, Low EMI, Stereo, Class D Audio Sub-System.
  • An Audio Subsystem is a combination of the building blocks found in the audio section of a portable device integrated into a single package. It combines all the audio signal routing, conditioning and amplification needs of a system and provides the designer a simplified interface through which to control the device.
  • The LM49450 is a fully integrated audio subsystem designed for portable media player applications. The LM49450 combines a 24-bit I 2 S digital-to-analog converter (DAC), 2.5W per channel, stereo, Class D speaker drivers, 36mW stereo ground referenced headphone drivers, volume control, and National’s unique 3D sound enhancement into a single device. The filterless Class D amplifiers deliver 1.25W per channel into an 8 ohm load with <1% THD+N with a 5V supply. The LM49450 stereo, 24-bit DAC supports a wide range of sample rates (including 192kHz, 96kHz, 48kHz, and 44.1kHz). The LM49450 features separate 32-step volume control for the headphones and speaker outputs. 3D enhancement, mode selection, shutdown control, and volume are controlled through an I 2 C compatible interface.
  • The LM49450 device is ideal for personal media/MP3 players, portable navigation, digital still/video cameras, mobile phones, and VoIP devices.
  • This slide shows the key Specification of the LM49450 device.
  • Here are some brief descriptions of class D Amplifiers, Fixed frequency mode, Spread spectrum, Headphone amplifiers and External Reference.
  • These are more descriptions of key terms like Low Power Shutdown, I2S CLOCK CONTROL, DAC Clock Divider, I2S WS Clock Dividers (I2S_CLK, WS_CLK), Charge Pump Clock Divider (CPDIV).
  • The Master CLK input is first divided by the R divider to produce the clock at point B; this is then decoded according to the D/A converter MODE to produce a signal which goes to both the DAC digital & DAC analog as well as an I2S interface. The table describes the relationship between the clocks, for each of the four possible DAC modes in terms of audio input sampling frequency fs.
  • The LM49450 features a headphone sense input or HPS that monitors the headphone jack and configures the device depending on the presence of a headphone. When the HPS pin is low, indicating that a headphone is not present, the LM49450 speaker amplifiers are active and the headphone amplifiers are disabled. When the HPS pin is high, indicating that a headphone is present, the headphone amplifiers are active while the speaker amplifiers are disabled.
  • This page shows pictorially the Performance characteristics of the device LM49450. first graph shows Total Harmonic Distortion VS output power and second one shows Efficiency vs Output Power.
  • This slide gives you circuit of one of the typical application of the device LMH49450
  • Thank you for taking the time to view this presentation on LM49450 . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simple call our sales hotline. For more technical information you may either visit the National Semiconductor site http://www.national.com/pf/LM/LM49450.html or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.
  • Transcript

    • 1. LM49450: Stereo Audio Subsystem
      • Source: National Semiconductor
    • 2. Introduction
      • Purpose
        • An Overview Study of I2S Input, 2.5 W Channel, Low EMI, Stereo, Class D Audio Sub-System: LM49450
      • Outline
        • Features & Applications
        • Key Specification
        • Typical Application
        • Amplifier Function
        • Clock Network, Headphone sense
      • Content
        • 11 pages
    • 3. What is an Audio Subsystem?
      • Simple, easy to use
      • Highly customizable
      • Improves time to market
      • Improves audio performance with better efficiency
      • Supports platform methodology
      • Supports software reuse
    • 4. Features
      • 24–Bit Stereo DAC
      • Stereo Filterless Class D Operation
      • Selectable spread spectrum mode reduces EMI
      • Ground Referenced Headphone Amplifiers with 100dB SNR
      • I 2 S Compatible Audio Interface
      • Audio Sample Rates up to 192kHz
      • 32-step Digital Volume Control
      • Headphone Sense Input
      • Click and Pop suppression
      • Micro-power shutdown
      • Output Short Circuit Protection
      • Thermal Overload Protection
    • 5. Applications
      • ■ Portable Media Players
      • ■ Portable Navigation Devices
      • ■ Multi-Media Monitors
      • ■ Laptops
      • ■ Portable Gaming Devices
      • ■ Mobile Handsets
    • 6. Key Specifications
      • ■ SNR at Headphone Output 102dBA (typ)
      • ■ Speaker Amplifier Efficiency at 3.6V, 650mW/channel into 8Ω 87% (typ)
      • ■ Speaker Amplifier Efficiency at 5V, 1.1W/channel into 8Ω 80% (typ)
      • ■ Quiescent Power Supply Current Line Inputs:
        • Speaker Mode at LSVDD = 3.6V 7.5mA (typ)
        • Headphone Mode at HPVDD = 2.5V 5.3mA (typ)
      • ■ Output Power/Channel Speaker at LSVDD = 5V:
        • RL = 4Ω, THD+N ≤ 10% 2.5W (typ)
        • RL = 8Ω, THD+N ≤ 1% 1.25W (typ)
        • Headphone at HPVDD = 2.5V:
        • RL = 16Ω, THD+N ≤ 1% 34mW (typ)
        • RL = 32Ω, THD+N ≤ 1% 36mW (typ)
      • ■ PSRR at 1kHz
        • Speaker Mode 67dB ( typ)
        • Headphone Mode 77dB (typ)
      • ■ Shutdown current 0.02μA (typ)
    • 7. Amplifier Function Class D Amplifier: The LM49450 features a high-efficiency stereo Class D audio power amplifier that utilizes National’s filterless modulation scheme which reduces external component count, conserves board space and reduces system cost Fixed Frequency Mode: In fixed frequency mode, the speaker amplifier outputs switch at a constant 300kHz. The output spectrum in fixed frequency mode consists of the fundamental and its associated harmonics. Spread Spectrum: The logic selectable spread spectrum mode eliminates the need for output filters, ferrite beads or chokes. the switching frequency varies randomly by 30% about a 300kHz center frequency, reducing the wideband spectral content, improving EMI emissions. Headphone Amplifier: The LM49450 headphone amplifiers feature National’s ground referenced architecture that eliminates the large DC blocking capacitors required at the outputs of traditional headphone amplifiers. External Reference: This Device can be used with an external reference. Disable the internal reference by setting bit B7 of the Mode Control Register (0x00h) to 1. This allows an external reference voltage to be applied to REF. For proper operation, do not allow the VREF to exceed VDD.
    • 8. Amplifier Function Contd… Low Power Shutdown: The LM49450 features an I2C selectable low power shutdown mode that disables the entire device, reducing quiescent current consumption to 0.05μA (digital + analog current). Set bit B0 in the mode control register (0x00h) to 0 to disable the device. Set B0 to 1 to enable the device. I2S CLOCK CONTROL: The LM49450 features the ability to derive multiple clock signals, Including the DAC clock, I2S clock and word select clock in master mode, and the charge pump oscillator frequency, from the MCLK input. DAC Clock Divider (RDIV): Bits B5-B0 in the CLOCK CONTROL register (0x01h) are the RDIV bits that set the DAC clock divider ratio. The DAC clock derived from MCLK needs to match the DAC sampling rate. I2S WS Clock Dividers (I2S_CLK, WS_CLK): In I2S master mode, the LM49450 I2S CLOCK CONTROL register (0x04h) can be used to set the I2S clock and WS clock frequency. In I2S clock master mode, bits B7-B4 of the I2S CLOCK CONTROL register, the I2S_CLK bits, set the I2S clock divider ratio. Charge Pump Clock Divider (CPDIV): The ground referenced headphone amplifiers charge pump derives its clock from MCLK. Bits B7-B0 of the CHARGE PUMP CLOCK register (0x02h) set the charge pump clock divider ratio.
    • 9. Clock Network
    • 10. Headphone Sense
      • The LM49450 features a headphone sense input (HPS) that monitors the headphone jack and configures the device depending on the presence of a headphone.
      • When the HPS pin is low, indicating that a headphone is not present.
      • When the HPS pin is high, indicating that a headphone is present.
      • The headphone amplifiers are
      • active while the speaker amplifiers are disabled.
    • 11. Typical Performance Efficiency vs Output Power THD+N vs Output Power
    • 12. Typical Application
    • 13. Additional Resource
      • For ordering the LM49450, please click the part list or
      • Call our sales hotline
      • For additional inquires contact our technical service hotline
      • For more product information go to
        • http://www.national.com/pf/LM/LM49450.html