Getting to Know the R8C/2A, 2B Group MCUs

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This training module provides an introduction to the R8C/2A, 2B group MCU series

This training module provides an introduction to the R8C/2A, 2B group MCU series

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  • Welcome to the training module on Renesas’s Getting to Know the R8C/2A &2B Group MCUs. This training module provides an introduction to the R8C/2A & 2B series of MCU.
  • The R8C/2A Group and R8C/2B Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core, employing sophisticated instructions for a high level of efficiency. With 1 MB of address space, it is capable of executing instructions at high speed. Power consumption is low, and the supported operating modes allow additional power control. These MCUs also use an anti-noise configuration to reduce emissions of electromagnetic noise and are designed to withstand EMI. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system components. The difference between the R8C/2A Group and R8C/2B Group is only the presence or absence of data flash. Their peripheral functions are the same.
  • Here is the block diagram of the R8C2A/2B group. These MCUs incorporate the R8C/Tiny series CPU core, high-speed on chip oscillators, a 10 bit analog-to-digital converter, an 8 bit digital-to-analog converter, multifunctional timers, different communication interfaces, and up to 128KB flash memory and 7.5KB RAM.
  • This slides lists the R8C/2A and R8C/2B group key features and benefits. The M16C platform’s compatibility for more design choices allows for the reuse of application code and development tools. The high efficient code makes these MCUs have more flexible addressing modes and save memory capacity. The MCUS have three operating modes: normal, wait, and stop. To save power, the peripheral functions can be turned off when they are not in use. This kind of low power operation can extent battery operating time which is important in portable devices. The fail-safe operation, enhances the reliability of the embedded systems. The internal flash memory with fast write/erase speeds enable the code to be easily changed in development, manufacturing, or in the field. Finally, these MCUs have very useful on-chip peripheral functions that decrease system chip count and reduce total system cost.
  • The flash memory can be programmed and reprogrammed off the board using a serial programmer. It can also be erased and written when the MCU is mounted on the circuit board. The on-chip flash is in-system programmable via the Boot and User programming modes. In the boot mode, the boot program built into the chip is called up to erase and then program the entire flash memory. New data to be programmed into the flash is obtained from the serial port. In the user mode, individual flash memory blocks can be erased or programmed under the control of a user program. These group MCUs provide protection against accidental writes or erases of the flash, which is accomplished by an ID code function.
  • The MCU has two 8-bit timers with 8-bit prescalers, three 16-bit timers, and a timer with a 4-bit counter and an 8-bit counter. The two 8-bit timers with 8-bit prescalers are timer RA and timer RB. These timers contain a reload register to store the default value of the counter. The three 16-bit timers is timer RC, timer RD, and timer RF, and have input capture and output compare functions. The 4-bit and 8-bit counters are timer RE, and has an output compare function. All the timers operate independently. The table shows the functional comparison of the timers.
  • The serial interface consists of three channels (UART0 to UART2). Each UART has an exclusive timer to generate the transfer clock and operates independently. Each UART has two modes: clock synchronous serial I/O mode and clock asynchronous serial I/O mode (UART mode). In clock synchronous serial I/O mode, data is transmitted and received using a transfer clock. In clock asynchronous serial I/O mode, the UART allows data transmission and reception after setting the desired bit rate and transfer data format. When reading data from the U sub I RB register ( where i = 0, 1 or 2) either in the clock synchronous serial I/O mode or in the clock asynchronous serial I/O mode, ensure the data is read in 16-bit units.
  • LIN is a communication and distributed processing bus system. It is characterized by a low cost hardware, a relatively low data transmission speed and a number of bus nodes. Distributed processing with LIN supports the reuse of hardware modules in multiple products. In LIN, almost all functionality is done by the firmware. LIN makes the ‘scale tip’ in favor of distributed processing due to its low per device hardware cost. The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
  • The MCUs have three operating modes: normal, wait, and stop. In normal mode, the device is fully operational. However, the main clock can be divided down by 2, 4, 8, and 16 so the CPU core and peripherals can run at less than full speed to conserve power. In wait mode, the CPU is turned off and all peripherals can operate either on the main clock or the RC oscillator. Power consumption can be up to 99% less, than it is in normal mode. In stop mode, the CPU and peripherals can be put into a deep-standby condition, reducing power to an absolute minimum. To save power, the peripheral functions can be turned off when they are not in use. Moreover, when the A/D converter isn’t being used, the software can even turn off the circuit that generates the converter’s reference voltage, thereby eliminating current flow from the Vref pin into the resistor ladder. In addition, all of 8-bit timers are able to operate in timer mode. In this mode, the timers can function independently for counting, without using the base oscillator.
  • When using the on-chip debugger to develop and debug programs for the R8C/2A Group and R8C/2B Group take note of the following: 1. Do not access the related UART1 registers. 2. Some of the user flash memory and RAM areas are used by the on-ship debugger. These areas cannot be accessed by the user. 3. Do not set the address match interrupt (registers AIER, RMAD0, and RMAD1 and fixed vector tables) in a user system. 4. Do not use the BRK instruction in a user system. 5. Debugging is available under the condition of supply voltage VCC = 2.7 to 5.5 V. Debugging with the on-chip debugger under less than 2.7 V is not allowed.
  • Thank you for taking the time to view this presentation on “ Getting to Know the R8C/2A, 2B Group MCUs ” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Renesas site or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.

Transcript

  • 1. Getting to Know the R8C/2A, 2B Group MCUs
    • Source: R ENESAS
  • 2. Introduction
    • Purpose
      • This training module provides an introduction to the R8C/2A, 2B group MCU series.
    • Outline
      • R8C/2A, 2B group overview
      • Block diagrams
      • Key features & benefits
    • Content
      • 12 pages
  • 3. R8C/2A, 2B Group Product Specifications
    • CPU : R8C 16-bit CPU Core
    • Minimum instruction execution time: 50 ns (When f (XIN) =20 MHz)
    • Power-supply voltage : 3.0 to 5.5 V/Max. 20 MHz; 2.7 to 5.5 V/Max. 10 MHz; 2.2 to 5.5 V/Max. 5 MHz
    • ROM/RAM : 48 KB/2.5 KB, 64 KB/3 KB, 96 KB/7 KB, 128 KB/7.5 KB*2
    • Data flash: 1 KB (only for the R8C/2B Group)
    • Clock generation circuit: 4 internal circuits
    • Low voltage detector circuit (LVD): 3 circuits
    • Power-on reset (POR)
    • Multifunctional timers
    • Serial I/O: Clock synchronous/UART: 3 I2C bus/Synchronous Serial communication Unit (SSU): 1 Hardware-LIN (employs UART and timer RA)
    • A/D converter: 10 bit x 12 ch
    • D/A converter: 8 bit x 2 ch
    • 55 I/O Port pins
    • Watchdog timer: 1 ch (supporting hardware reset)
  • 4. Block Diagram Only for R8C/2B
  • 5. R8C/2A/B Group Key Features & Beninfits
    • M16C platform compatibility – for more design choices
    • Code compression – for compact code that save memory
    • Low power consumption – for long battery operating time
    • Extensive fail-safe features – for reliable system operation
    • Electromagnetic compatilbity – for reliability and compliance
    • High-performance flash – for flexibility in lab, manufacturing, field
    • Cost-saving peripheral integration – for fewer chips per system
    • Low cost development tools – for short design/debug cycles
  • 6. On-Chip Flash Memory
    • Single-voltage programming
    • In-system programmable (ISP)
      • Boot mode via serial port
        • Provide automatic baud rate detection with host
        • Automatically erases flash
      • CPU-rewrite mode (User mode)
        • Enables MCU to rewrite its internal flash memory under user program control
        • Uses built-in hardware sequencer for flash commands
    • Flash Security function
      • Prevents accidental erases of flash
      • Requires ID code check to access flash
  • 7. Multifunctional Timers - - Reset Synchronous PWM Mode - - - Three-phase waveforms output - - PWM mode PWM mode Programmable one-shot / wait generation mode - One-shot Waveform output Output compare mode Output compare mode Timer mode Timer mode Programmable waveform generation mode Pulse output mode, Event counter mode PWM output Increment Increment Increment/Decrement Increment Decrement Decrement Count 16-bit timer 4bit counter 8bit counter 16-bit timer × 2 16-bit timer 8-bit timer 8-bit timer Configuration Timer RF Timer RE Timer RD Timer RC Timer RB Timer RA Item
  • 8. Serial Interface
  • 9. Hardware LIN
    • Master mode
      • Generates Synch Break
      • Detects bus collision
    • Slave mode
      • Detects Synch Break
      • Measures Synch Field
      • Controls Synch Break and Synch Field signal inputs to UART0
      • Detects bus collision
  • 10. Low Power Consumption
  • 11. On-Chip Debugging
    • Single-wire debugging communications using Mode pin is possible!
    • Increased number of I/O pins for users
      • Since there are no pins occupied (except for the MODE pin) when using the on-chip debugging function, there are more effective I/O pins than products with the same number of pins.
    • All pin functions can be evaluated
      • I/O port, peripheral functions, oscillation circuit, etc.
    • On-chip debugging is possible in the same conditions as those in mass production.
  • 12. Additional Resource
    • For ordering the R8C/2A/B MCUs, please click the part list or
    • Call our sales hotline
    • For additional inquires contact our technical service hotline
    • For more product information go to
      • R8C/2A
      • R8C/2B