An Overview Study on I/O Expander with I2C and SMBus Interface <ul><li>Source: NXP </li></ul>
Introduction <ul><li>Purpose </li></ul><ul><ul><li>An Overview Study on I/O Expander with I2C and SMBus Interface </li></u...
Features <ul><li>Compatible with I2C-bus and SMBus </li></ul><ul><li>8 or 16 programmable GPIO compatible with most proces...
Applications <ul><li>•  Keypad and switch control </li></ul><ul><li>•  ACPI power switch, relays, timer </li></ul><ul><li>...
Block Diagram
Simplified Schematic Of I/O Port
Registers Description Command Register:  The command byte is the first byte to follow the address byte during a write  is ...
Bus Transactions Writing to the port registers Write to Configuration registers
Reading The Port Registers
Minimizing IDD When The I/Os Are Used to Control LEDs Fig 1: High value resistor in parallel with the LED Fig 2: Device su...
Typical Application
Additional Resource <ul><li>For ordering the PCA9535, please click the part list or </li></ul><ul><li>Call our sales hotli...
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An Overview Study on I/O Expander with I2C and SMBus Interface

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An Overview Study on I/O Expander with I2C and SMBus Interface

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  • Welcome to the training module on NXP’s I/O Expander with I2C and System Management or SM-Bus Interface.
  • In this presentation, we will discuss key Of the device
  • The PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
  • Some examples of common applications include:
  • The PCA9535 and PCA9535C consist of two 8-bit Configuration (Input or Output selection), Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system master. The PCA9535 and PCA9535C open-drain interrupt output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (A0, A1, A2) vary the fixed I2C-bus address and allow up to eight devices to share the same I2C-bus/SMBus.
  • The functional diagrams and I/O schematics for all the devices are the same, except the PCA9535 which has two 8-bit blocks of I/O and the PCA9535C has the upper transistor (Q1) disconnected. The PCA9535C is an open-drain version of the PCA9535, used to drive LEDs without sourcing current. The system master can enable the I/O as inputs or outputs by writing to the I/O configuration bits. Data for each input or output is kept in the corresponding input or output register. The open-drain interrupt output is activated when any input state differs from its corresponding input port register state. Three hardware pins (A0, A1, A2) vary the fixed I2Cbus address and allow up to eight of these devices, in any combination, to share the same I2C/SMBus. The outputs on the PCA9534/35 sink 25 mA and source 10 mA. The open-drain outputs on the PCA9535C sink 25 mA, but don’t provide any source current.
  • This page gives you information about Register Description used in PCA9535. it has five registers like Command Register, Input Port Register, Output Port Register, Polarity inversion register, Configuration Register. These registers are accessed by Microcontroller through I2C communication and the Data can be Read or written from these registers.
  • Data is transmitted to the PCA9535/PCA9535C by sending the device address and setting the least significant bit to a logic 0. The command byte is sent after the address and determines which register will receive the data following the command byte. The eight registers within the PCA9535/PCA9535C are configured to operate as four register pairs. The four pairs are Input Ports, Output Ports, Polarity Inversion Ports, and Configuration Ports. After sending data to one register, the next data byte will be sent to the other register in the pair.
  • In order to read data from the PCA9535/PCA9535C, the bus master must first send the PCA9535/PCA9535C address with the least significant bit set to a logic 0. The command byte is sent after the address and determines which register will be accessed. After a restart, the device address is sent again, but this time the least significant bit is set to a logic 1. Data from the register defined by the command byte will then be sent by the PCA9535/PCA9535C. Data is clocked into the register on the falling edge of the acknowledge clock pulse. After the first byte is read, additional bytes may be read but the data will now reflect the information in the other register in the pair.
  • When the PCA9535 I/Os are used to control LEDs, they are normally connected to VDD through a resistor. Since the LED acts as a diode, when the LED is off the I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes lower than VDD. Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or equal to VDD when the LED is off. Fig 1 shows a high value resistor in parallel with the LED. Fig 2 shows VDD less than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI at or above VDD and prevents additional supply current consumption when the LED is off. This concern does not occur in the case of PCA9535C because the I/O pins are open-drain.
  • Shows on this slide is how to use the PCA9535 device to add more I/O ssss. In the diagram, are a few sensors connected as i/o. There is also a keypad interface. All these are controlled by the master controller through I2C communication.
  • Thank you for taking the time to view this presentation on PCA9535. If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simple call our sales hotline. For more technical information you may either visit the NXP site http://www.nxp.com/#/pip/pip=[pip=PCA9535_PCA9535C_5]|pp=[t=pip,i=PCA9535_PCA9535C_5]| or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.
  • An Overview Study on I/O Expander with I2C and SMBus Interface

    1. 1. An Overview Study on I/O Expander with I2C and SMBus Interface <ul><li>Source: NXP </li></ul>
    2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>An Overview Study on I/O Expander with I2C and SMBus Interface </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Features and Application. </li></ul></ul><ul><ul><li>Block Diagram </li></ul></ul><ul><ul><li>Simplified schematic of I/O port </li></ul></ul><ul><ul><li>Register description </li></ul></ul><ul><ul><li>Bus Transactions </li></ul></ul><ul><ul><li>Typical Application Circuit </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>12 pages </li></ul></ul>
    3. 3. Features <ul><li>Compatible with I2C-bus and SMBus </li></ul><ul><li>8 or 16 programmable GPIO compatible with most processors </li></ul><ul><ul><li>– Input or output </li></ul></ul><ul><ul><li>– Push-pull or open-drain outputs </li></ul></ul><ul><ul><li>– True bidirectional operation </li></ul></ul><ul><li>Outputs can drive LEDs directly </li></ul><ul><ul><li>– 25-mA (max) sink and 10-mA (max) source per bit </li></ul></ul><ul><ul><li>– 100-mA (max) capacity per 8-bit register </li></ul></ul><ul><li>Open-drain interrupt output activates when input changes state </li></ul><ul><li>Low standby current (IDD): <1.0 μA (max) </li></ul><ul><li>Operating voltage: 2.3 to 5.5 V </li></ul><ul><li>All I/O tolerant to 5.5 V </li></ul><ul><li>Temperature range: -40 to +85 °C </li></ul><ul><li>I2C-bus clock frequency: 0 to 400 kHz </li></ul><ul><li>High-volume CMOS process </li></ul><ul><li>Package options: SO, TSSOP, HVQFN, HWQFN </li></ul>
    4. 4. Applications <ul><li>• Keypad and switch control </li></ul><ul><li>• ACPI power switch, relays, timer </li></ul><ul><li>• LED control </li></ul><ul><li>• Signal monitoring </li></ul><ul><li>• Sensors, fan control </li></ul>
    5. 5. Block Diagram
    6. 6. Simplified Schematic Of I/O Port
    7. 7. Registers Description Command Register: The command byte is the first byte to follow the address byte during a write is used as a pointer to determine which of the following registers will be written or read. Registers 0 and 1: Input port registers: This register is an input-only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect Registers 2 and 3: Output port registers: This register is an output-only port. It reflects the outgoing logic levels of the pins defined as outputs by Registers 6 and 7. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection Registers 4 and 5: Polarity Inversion registers: This register allows the user to invert the polarity of the Input port register data. If a bit in this register is set (written with ‘1’), the Input port data polarity is inverted. If a bit in this register is cleared (written with a ‘0’), the Input port data polarity is retained Registers 6 and 7: Configuration registers: This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output.
    8. 8. Bus Transactions Writing to the port registers Write to Configuration registers
    9. 9. Reading The Port Registers
    10. 10. Minimizing IDD When The I/Os Are Used to Control LEDs Fig 1: High value resistor in parallel with the LED Fig 2: Device supplied by a lower voltage <ul><li>I/O pins should be greater than or equal to VDD when the LED is off </li></ul><ul><li>These circuit prevents additional supply current consumption when the LED is off. </li></ul>
    11. 11. Typical Application
    12. 12. Additional Resource <ul><li>For ordering the PCA9535, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For additional inquires contact our technical service hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http://www.nxp.com/#/pip/pip=[pip=PCA9535_PCA9535C_5]|pp=[t=pip,i=PCA9535_PCA9535C_5]| </li></ul></ul>Newark Farnell

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