This is an overview study of the Atmel AVR32UC3 MCU: AT32UC3A3256
Welcome to the training module on AT32UC3A3256 . This training module introduces briefly the features and applications of the Atmel MCU AVR32UC3.
Atmel’s MCU has High-Performance/Low-Power 8- to 32-bit Microcontrollers/Processors, it offers a broad portfolio of 8- and 32-bit AVR®s. Since day one, the AVR philosophy has always been simple: highest performance with no power penalty. Atmel offers a broad range of AVR microcontrollers: • tinyAVR®, 1-16 KBytes Flash, 8- to 32-pin packages • megaAVR®, 4-256 KBytes Flash, 28- to 100-pin packages • AVR XMEGATM, 16-384 KBytes Flash, 44- to 100-pin packages • AVR32 UC3, 16-512 KBytes Flash, 48- to 144-pin packages • AVR32 AP7, 210 DMIPS throughput at 150 MHz, 196- to 256-pin packages
The New AVR32 UC3 MCU has the following features: Multiply/MAC/Divide pipeline, Integer and Fixed point arithmetic, Saturating and rounding math, DSP instruction set, Encryption and decryption. Faster communication involves Peripheral DMA, Dual port SRAM, Distributed SRAM, Hi-Speed USB, Ethernet, SD, NAND, SDRAM, SPI, USART, I2S. Low power consumption: 0.8 mW / MHz & True 1.6V operation, Dynamic Frequency Scaling, Independent peripheral clock domain, Split CPU pipeline. Better development tools: it has AVR32 Software Framework, AVR32 Studio & GCC, IAR EW, JTAGICE mkII & AVR ONE!
Power consumption figures are typical values at 36 MHz as listed in each device’s official datasheet. Linear interpolation was used to derive the 36MHz power consumption. The table demonstrates how the AVR32 is both the highest performance AND the lowest power 32-bit microcontroller. From this table, it is easy to see how the AVR32 A-series and the STM32F103 from ST are both able to achieve a score of 90 Dhrystones when clocked at their respective maximum frequency. But the AVR32 (both the A and B series) consume far less power doing so. The Dhrystone / mW figure allows easy comparison of how much energy is required to generate each Dhrystone.
The AVR32 UC3 delivers high computational throughput, deterministic real-time control, low power, low system cost, high reliability, and ease of use. The CPU includes leading-edge features such as DSP arithmetic, single-cycle multiply-accumulate instructions, and single-cycle SRAM access.
The AVR32 UC3 includes a state of the art low power architecture. It consumes less than 0.8 mW/MHz in active mode. Designed to deliver more work per MHz than any competitor and with features such as dynamic frequency scaling and peripheral event controller, the AVR32 UC3 is the best 32 bit low power alternative in the market today. With parallel buses, peripheral DMA controller, memory to memory DMA controller and split memory architecture, the AVR32 UC3 delivers superior bandwidth.
UC3A Series MCUs have a six-layer high speed bus matrix with point-to-point connections from all masters to all slaves, enabling masters to concurrently access any slave at a maximum speed of 264M bytes per second at 66 MHz. If multiple masters wish to access the same slave, arbitration is automatically performed. The bus masters in UC3A Series devices are the AVR32 UC core data and instruction interfaces, peripheral DMA controller, and several high speed peripherals such as the Ethernet MAC and USB. The bus slaves are the on-chip SRAM and Flash memories, USB, the two peripheral bus bridges, and the external bus interface (EBI). A full speed (12 Mbps) USB 2.0 device with On-The-Go (OTG) capability has dedicated DMA, can interface to a personal computer as a device and can behave as a USB host to support small USB devices such as USB Flash keys, printers, keyboards or mice.
The AVR32 CPU is targeted at a wide range of 32-bit applications. The CPU can be delivered in very different implementations in various ASIC’s, ASSP’s, and standard parts to satisfy requirements for low-cost as well as high-speed markets. According to the cost sensitivity and complexity of these applications, a similar span in debug complexity must be expected.
The AVR32 UC3 delivers high computational throughput, deterministic real-time control, low power, low system cost, high reliability, and ease of use. The CPU includes leading-edge features such as DSP arithmetic, single-cycle multiply-accumulate instructions, and single-cycle SRAM access. In addition, a Peripheral DMA controller and multi-layer high-speed bus architecture make the UC3 core ideal for high-throughput applications. UC3 devices are perfectly suited for portable and battery-based applications thanks to their outstanding low-power properties.
The AVR32 UC3 includes a state of the art low power architecture. It consumes less than 0.8 mW/MHz in active mode. Designed to deliver more work per MHz than any competitor and with features such as dynamic frequency scaling and peripheral event controller.The AVR32 UC3 is the best 32 bit low power alternative in the market today. It can handle high speed data communication like Hi-Speed 480 Mbit per sec, it supports Dual SD card, and it has High Speed NAND controller interface.
This device has a built in stereo audio DAC which can be connected to an external class D amplifier with 16-bit resolution. It has external IIS codec interface which supports stereo 4 channel full surround output and CD-Rom Mic input.
Fast SRAM access is critical to achieving the necessary computing performance. The UC3 CPU has a single-cycle access to the SRAM embedded in the CPU itself. High performance peripheral modules require a true memory DMA controller. In addition, the memory is partitioned such that one memory block resides inside the CPU to support single cycle memory access during program execution. The AVR32 CPU and its tightly coupled dual port SRAM allow fast computation without latencies from pipeline stalls or system bus arbitrations.
This table shows the required CPU speed and memory footprint for the audio decoder library. The engineer can select which audio formats to support by including one or more of these library modules into the project. The table shows SRAM used by the decoder itself. This does not include optional buffers applied to input and output audio streams.
In addition to the audio decoder library, an application may also require the Mass Storage modules. The USB Mass Storage stack is required for accessing USB Mass Storage devices. The same library is used when connecting the EVK1105 to the PC and mounting one or more of the memories as a USB mass storage device. In order to interface to an SD card or another memory formatted with FAT file system, the FAT library is required.
AVR32 UC3 microcontrollers benefit from the well-established AVR tools and software chain renowned for its quality and ease of use. Selecting the UC3 microcontroller will bring your application higher performance and lower power consumption, as well as a seamless ecosystem of source code libraries, development tools, documentation, and a large user community.
While the simplest development takes place on simulators and development boards, most will require basic on-chip debug emulators, and a few will require complex emulators with full-speed trace. To match these criteria, the AVR32 OCD system is designed in accordance with the Nexus 2.0 standard, which is a highly flexible and powerful open on-chip debug standard for 32-bit microcontrollers. The OCD system interfaces provides the external debugger with access to the on-chip debug logic through the JTAG port and the Auxiliary (AUX) port.
The AVR32 UC3 Software Framework offers a unique collection of application software, drivers and libraries. Combined with high-quality, low-cost development tools and a skilled world wide support staff we are proud to ensure the shortest time to market. AVR32 UC3 microcontrollers benefit from the well-known AVR tools and software chain, which is renowned for its quality and seamless integration of devices, hardware and software tools, and documentation. Embedded developers will find it easy to succeed with the AVR32.
The AVR32 Software Framework contains drivers for popular off-chip components such as QTouch capacitive touch keyboards, LCD displays, SRAM/SDRAM/NAND Flash memories, SD/MMC storage cards, and audio amplifiers/codecs. To simplify the process of writing code for a specific hardware board, the AVR32 Software Framework uses a Boards layer to describe the external hardware and configure the board specific multiplexing of peripheral functions through the AVR32 I/O pins.
Atmel has now introduced the AVR32 EVK1105 Digital Audio Gateway reference kit, designed to demonstrate the full potential of the AVR32 microcontrollers in digital audio decoding and playback applications. Built around the AVR32 UC3A0 series, the kit demonstrates the superior digital signal processing and communications performance of the AVR32 microcontrollers. The kit was built as a spin-off from a turn key solution provided by Atmel to large customers in the audio industry. The kit contains production ready code which saved months of development time for new products. Many products built from this turn-key solution are already introduced on the market.
This page gives brief features of EVK1104 which includes: • Hi-Speed USB OTG interface, 320 x 240 QVGA TFT LCD, Two MMC/ SD card connectors, SPI, TWI and USARTs, Capacitive Touch interface.
The AVR32 offers high arithmetic performance and unrivalled performance per watt to any embedded design. The UC3A and UC3B series are already sampling, with more devices on the way in the near future. The AVR32 offerst the same easy to use development tools and excellent support that Atmel’s customers have become accustomed to.
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An Overview Study on AVR32UC3 MCU: AT32UC3A3256