An Overview on Programmable System on Chip: PSoC-5  <ul><li>Source: Cypress Semiconductor </li></ul>
Introduction <ul><li>Purpose </li></ul><ul><ul><li>An   Overview   on   Programmable   System   on   Chip:   PSoC-5 </li><...
Introducing PSoC® 3 and PSoC® 5: One Platform, Three Architectures PSoC Creator™ -  Revolutionary Integrated Development E...
PSoC-3 and PSoC- 5 Performance
PSoC 3 / PSoC 5 Platform Architecture
CPU Subsystem <ul><li>Industry’s leading embedded CPU company </li></ul><ul><li>Broad support for middleware and applicati...
Clock Distribution <ul><ul><li>Clock dividers </li></ul></ul><ul><ul><li>16-bit dividers </li></ul></ul><ul><ul><li>8 cloc...
Digital Subsystem <ul><li>Flexibility of a PLD integrated with a CPU </li></ul><ul><li>Provides hardware capability to imp...
Optimized 16-bit Timer/Counter/PWM Blocks <ul><li>Provides nearly all of the features of a UDB based timer, counter, or PW...
Configurable Analog System <ul><li>Flexible Routing: All GPIO are Analog Input/Output </li></ul><ul><li>±  0.1% Internal R...
Programmable Routing/Interconnect Input / Output System <ul><li>Three types of I/O </li></ul><ul><ul><li>GPIO, SIO, USBIO ...
Interrupts <ul><li>Interrupt Controller </li></ul><ul><ul><li>32 interrupt vectors </li></ul></ul><ul><ul><li>Dynamically ...
Low Power Modes Power mode Current (PSoC 3) Current (PSoC 5) Code execution Digital resources available Analog resources a...
Dedicated Communication Peripherals <ul><li>Full Speed USB device </li></ul><ul><ul><li>8 bi-directional data end points +...
PSoC Creator Design Flow <ul><li>Configure </li></ul><ul><ul><li>Start a new project </li></ul></ul><ul><ul><li>Place comp...
Features   of   CY8CKIT-001   <ul><li>The   CY8CKIT-001   PSoC   Development   Kit   is   designed   to   aid   hardware, ...
CY8CKIT-001 PSoC® Development Kit  <ul><li>The   kit   contains:   </li></ul><ul><li>PSoC   Development   Board   test   <...
CY8CKIT-014 PSoC® 5 FirstTouch™ Starter Kit
Features   of   CY8CKIT-014   Kit   <ul><li>PSoC   Creator   development   software   with   an   integrated,   GCC   comp...
Additional Resource <ul><li>For ordering PSoC 5 devices, please click the part list or </li></ul><ul><li>Call our sales ho...
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An Overview on Programmable System on Chip: PSoC-5

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An Overview on Programmable System on Chip: PSoC-5

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  • Welcome to the training module on Cypress’s Programmable system on chip: PSoC 5
  • In this modules we will study the Architecture of PSoC5 devices.
  • Cypress semiconductor has three architecture based Programmable system on chip, PSoC 1 is based on M8C Architecture which is Cypress proprietary based and PSoC 3 is based on industry standard 8051 architecture based, and PSoC 5 is based on 32-bit Cortex-M3 CPU.
  • This slide compare the performances between PSoC 1, PSoC 3 and PSoC 5. It brings the PSoC design methodology to high precision analog &amp; high performance 8-, 16- and 32-bit markets. PSoC 1 is M8C based architecture with 4 MIPS and 32KB of flash memory. PSoC 3 is based on the 8051 which has 33 MIPS processing speed with 64KB of flash and finally PSoC 5 is based on ARM Cortex-M3 and its processing speed is 100 DMIPS with 256KB of flash memory.
  • PSoC is the programmable embedded SoC integrating configurable analog and digital peripheral functions, memory and a microcontroller on a single chip. PSoC 5 is a true programmable embedded system-on-chip integrating configurable analog and digital peripheral functions, memory and a microcontroller on a single chip. There are 4 main components of the PSoC Platform: CPU Subsystem, Digital Subsystem, Analog Subsystem and Programmable Routing and Interconnect. Universal Digital Blocks Implement features in hardware that reduce CPU processing requirements, lowering power consumption On-board DMA Controller Direct memory transfer between peripherals offloads CPU operation, lowering power consumption Integrated Analog, Digital and Communication Peripherals Reduce external component counts and lower overall system power consumption Precise CPU frequencies PLL allows 4,032 different frequencies; tunable power consumption
  • PSoC 5 is a true programmable embedded system-on-chip integrating configurable analog and digital peripheral functions, memory and a microcontroller on a single chip, its architecture boosts performance through: Integrated high-precision 20-bit resolution analog, Ultra low power with industry’s widest voltage range, Programmable PLD-based logic, 32-bit ARM® Cortex™-M3 CPU up to 80 MHz.
  • Eight 16-bit clock dividers generate digital system clocks for general use in the digital system, as configured by the design’s requirements. Digital system clocks can generate custom clocks derived from any of the seven clock sources for any purpose. Examples include baud rate generators, accurate PWM periods, and timer clocks, as well as many others. If more than eight digital clock dividers are required, the Universal Digital Blocks (UDBs) and fixed function Timer/Counter/PWMs can also generate clocks. Four 16-bit clock dividers generate clocks for the analog system components that require clocking, like ADCs and mixers. The analog clock dividers include skew control to ensure that critical analog events do not occur simultaneously with digital switching events. This is done to reduce analog system noise.
  • Universal Digital Block is capable of Intelligent routing Efficiency of the UDBs (part/pieces of each UDB can be used sep.) Custom logic Standard peripherals + custom logic It has ~500 - 700 gates per UDB, 24 UDBs in the larger chips, p rovides nearly all of the features of a UDB based timer, counter, or PWM in an area optimized peripheral. Each block may be configured as either a full featured 16-bit Timer, Counter, or PWM.
  • Provides nearly all of the features of a UDB based timer, counter, or PWM in an area optimized peripheral. PSoC Creator provides easy access to these flexible blocks. Each block may be configured as either a full featured 16-bit Timer, Counter, or PWM. It has Flexibility features like: Clock, Enable, Reset, Capture, Kill from any pin or digital signal on chip. Independent control of terminal count, interrupt, compare, reset, enable, capture, and kill synchronization.
  • The configurable analog system uses separate modules The PSoC3/5 architecture has a huge portfolio of analog IP. Exact configuration depends on the product family. It has 20-bit DelSig samples at 180 samples per second.
  • This slide talks about routing and interconnects. The device has 3 types of I/Os, namely: general purpose I/Os, Serial I/Os and USB I/Os. GPIOs can be conneted to any peripheral routing. There are 8 different configurable drive modes.
  • Tail Chaining allows the processor to transit from the currently executing ISR directly to another pending ISR without having to spend the normally required cycles to restore state back to main and then to store the state again to get back to the other pending interrupt.
  • These are the various PSoC power modes. They are: Active Mode, Sleep Mode and Hibernate Mode.
  • PSOC devices have dedicated communication peripherals like full speed USB device, full CAN 2.0b, I2C master or slave.
  • Cypress PSoC 3 and 5 devices can be programmed using the PSOC Creator. This IDE has the same industry look and feel. It’s design flow involves configuration of the components, developing hardware design, writing code, compiling, building and programming the hex file to the device.
  • CY8C-KIT-001 is the PSoC development kit. The board also has a prototyping area containing a small bread board complete with I/O port sockets nearby, multipurpose LEDs, mechanical push buttons, and a multipurpose variable resistor. Three capacitive sensing elements: two buttons and a 5 segment slider are included on the board allowing evaluation of CapSense™ touch-sensing applications. The board has four GPIO expansion slots around the periphery providing expandability of the I/O to external boards.
  • The CY8CKIT-001 kit contains a main PSoC development board, and three processor module boards for the different architectures: PSoC 1, PSoC 3 and PSoC 5 devices. It also includes a MiniProg3 debug and evaluation device, prototyping cable kit, a USB cable, a 12V AC power adapter, and both PSoC Creator™ and PSoC Designer™ software. The CY8C-KIT-001 PSoC® Development Kit provides you a common development platform where you can prototype and evaluate different solutions using any one of the PSoC1, PSoC3, or PSoC5 architectures. This guide and kit gives you a practical understanding of PSoC technology. In addition, the kit gives several example projects with step-by-step instructions to enable you to easily get started developing PSoC solutions.
  • The PSoC 5 FirstTouch™ Starter Kit is designed to introduce you to the PSoC programmable system-on-chip design methodology and Cypress&apos;s new PSoC 5 architecture. This full-featured starter kit ships with an array of sensors, I/O&apos;s, projects &amp; software to quickly get you up to speed with PSoC Creator and our powerful design methodology so you can easily evaluate PSoC.
  • This page gives the features and kit content of CY8CKIT-014 Kit it has different types of interface like Accelerometer, Thermistor Proximity sensor
  • Thank you for taking the time to view this presentation on “PSoC 5 ” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Cypress site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility. You may visit Element 14 e-community to post your questions.
  • An Overview on Programmable System on Chip: PSoC-5

    1. 1. An Overview on Programmable System on Chip: PSoC-5 <ul><li>Source: Cypress Semiconductor </li></ul>
    2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>An Overview on Programmable System on Chip: PSoC-5 </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Introducing PSoC® 3 and PSoC® 5 </li></ul></ul><ul><ul><li>PSoC-3 and PSoC- 5 Performance </li></ul></ul><ul><ul><li>CPU Subsystem, Digital and Analog </li></ul></ul><ul><ul><li>Interrupts, Low Power Modes </li></ul></ul><ul><ul><li>PSoC Creator Design Flow </li></ul></ul><ul><ul><li>PSoC 5 Kits: CY8CKIT-001, CY8CKIT-014 </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>20 pages </li></ul></ul>
    3. 3. Introducing PSoC® 3 and PSoC® 5: One Platform, Three Architectures PSoC Creator™ - Revolutionary Integrated Development Environment for PSoC 3 and PSoC 5 PSoC 1 - Performance, programmability and flexibility with a cost-optimized 8-bit M8C CPU Subsystem PSoC 3 - Single-cycle, pipelined 8-bit 8051 and a high-performance configurable digital system for unmatched analog and digital bill-of- materials integration PSoC 5 - 32-bit 80 MHz ARM Cortex-M3 CPU for larger, more complex applications with additional flash, SRAM and off-chip memory access including RTOS support
    4. 4. PSoC-3 and PSoC- 5 Performance
    5. 5. PSoC 3 / PSoC 5 Platform Architecture
    6. 6. CPU Subsystem <ul><li>Industry’s leading embedded CPU company </li></ul><ul><li>Broad support for middleware and applications </li></ul><ul><li>Up to 80 MHz; 100 DMIPS </li></ul><ul><li>Enhanced v7 ARM architecture:Thumb2 Instruction </li></ul><ul><li>Set,16- and 32-bit Instructions (no mode switching), </li></ul><ul><li>32-bit ALU; Hardware based multiplication and division. </li></ul><ul><li>Single cycle 3-stage pipeline; Harvard architecture </li></ul><ul><li>Up to 67 MHz; 33 MIPS </li></ul><ul><li>Single cycle instruction execution </li></ul><ul><li>Flash memory with ECC </li></ul><ul><li>High ratio of SRAM to flash </li></ul><ul><li>24-Channel Direct Memory Access </li></ul><ul><li>Access to all Digital and Analog Peripherals </li></ul><ul><li>CPU and DMA simultaneous access to independent </li></ul><ul><li>SRAM blocks </li></ul><ul><li>Industry standard JTAG/SWD (Serial Wire Debug) </li></ul><ul><li>On chip trace, NO MORE ICE </li></ul>
    7. 7. Clock Distribution <ul><ul><li>Clock dividers </li></ul></ul><ul><ul><li>16-bit dividers </li></ul></ul><ul><ul><li>8 clock source inputs </li></ul></ul><ul><ul><li>8 digital clock dividers </li></ul></ul><ul><ul><li>4 analog clock dividers </li></ul></ul><ul><ul><ul><li>Provide skew control to reduce digital switching noise </li></ul></ul></ul><ul><ul><li>1 CPU divider </li></ul></ul><ul><ul><li>UDBs can be used to create additional digital clocks </li></ul></ul>Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Digital Clock Divider 16 - bit Analog Clock Divider 16 - bit Analog Clock Divider 16 - bit Analog Clock Divider 16 - bit Analog Clock Divider 16 - bit Skew Skew Skew Skew Bus / CPU Divider 16 - bit 7 7 PLL 4 - 33 MHz ECO 32 kHz ECO 3 - 67 MHz IMO 0 - 33 MHz Ext Osc 1 , 33 , 100 kHz ILO
    8. 8. Digital Subsystem <ul><li>Flexibility of a PLD integrated with a CPU </li></ul><ul><li>Provides hardware capability to implement components from a rich library of pre-built, documented, and characterized components in PSoC Creator </li></ul><ul><li>PSoC Creator will synthesize, place, and route components automatically. </li></ul><ul><li>Fine configuration granularity enables high silicon utilization </li></ul><ul><li>DSI routing mesh allows any function in the UDBs to communicate with any other on-chip function/GPIO pin with 8- to 32-bit data buses </li></ul>Universal Digital Block Array (UDBs)
    9. 9. Optimized 16-bit Timer/Counter/PWM Blocks <ul><li>Provides nearly all of the features of a UDB based timer, counter, or PWM </li></ul><ul><li>PSoC Creator provides easy access to these flexible blocks </li></ul><ul><li>Each block may be configured as either a full featured 16-bit Timer, Counter, or PWM </li></ul><ul><li>Programmable options </li></ul><ul><ul><li>Clock, enable, reset, capture, kill from </li></ul></ul><ul><ul><li>any pin or digital signal on chip </li></ul></ul><ul><ul><li>Independent control of terminal count, interrupt, compare, reset, enable, capture, and kill synchronization </li></ul></ul><ul><li>Plus </li></ul><ul><ul><li>Configurable to measure pulse widths or periods </li></ul></ul><ul><ul><li>Buffered PWM with dead band and kill </li></ul></ul>
    10. 10. Configurable Analog System <ul><li>Flexible Routing: All GPIO are Analog Input/Output </li></ul><ul><li>± 0.1% Internal Reference Voltage </li></ul><ul><li>Delta-Sigma ADC: </li></ul><ul><ul><li>Up to 20-bit resolution </li></ul></ul><ul><ul><li>16-bit at 48 ksps or 12-bit at 192 ksps </li></ul></ul><ul><li>SAR ADC: 12-bit at 1 Msps </li></ul><ul><li>DACs: 8 – 10-bit resolution, current and voltage mode </li></ul><ul><li>Low Power Comparators </li></ul><ul><li>Op-amps (25 mA output buffers) </li></ul><ul><li>Programmable Analog Blocks </li></ul><ul><ul><li>Configurable PGA (up to x50), Mixer, Trans-Impedance Amplifier, Sample and Hold </li></ul></ul><ul><li>Digital Filter Block: Implement HW IIR and FIR filters </li></ul><ul><li>CapSense Touch Sensing enabled </li></ul>
    11. 11. Programmable Routing/Interconnect Input / Output System <ul><li>Three types of I/O </li></ul><ul><ul><li>GPIO, SIO, USBIO </li></ul></ul><ul><li>Any GPIO to any peripheral routing </li></ul><ul><li>Wakeup on analog, digital or I2C match </li></ul><ul><li>Programmable slew rate reduces power and noise </li></ul><ul><li>8 different configurable drive modes </li></ul><ul><li>Programmable input threshold capability for SIO </li></ul><ul><li>Auto and custom/lock-able routing in PSoC Creator </li></ul>Up to 4 separate I/O voltage domains <ul><ul><li>Interface with multiple devices using one PSoC 3 / PSoC 5 device </li></ul></ul>
    12. 12. Interrupts <ul><li>Interrupt Controller </li></ul><ul><ul><li>32 interrupt vectors </li></ul></ul><ul><ul><li>Dynamically adjustable vector addresses </li></ul></ul><ul><ul><li>8 priority levels </li></ul></ul><ul><ul><li>Each vector supports one of three sources </li></ul></ul><ul><ul><li>Fixed function, DMA, DSI (UDB) route </li></ul></ul><ul><li>8051 </li></ul><ul><ul><li>32 interrupt vectors vs. standard 8051 is 5 </li></ul></ul><ul><ul><li>ARM Cortex-M3 </li></ul></ul><ul><ul><li>32 interrupts + 15 exceptions </li></ul></ul><ul><ul><li>Tail chaining </li></ul></ul>
    13. 13. Low Power Modes Power mode Current (PSoC 3) Current (PSoC 5) Code execution Digital resources available Analog resources available Clock sources available Wakeup sources Reset sources Active 1.2 mA @ 6MHz 2 mA @ 6MHz Yes All All All N/A All Sleep 1 uA 2 uA No I2C Comparator Low Speed and 32 kHz Osc IO, I2C, RTC, sleep timer, comparator XRES, LVD, WDR Hibernate 200 nA 300 nA No None None None IO XRES, LVD Power Management Enabled in PSoC Creator <ul><ul><li>Provides easy to use control APIs for quick power management </li></ul></ul><ul><ul><li>Allows code and register manipulation for in-depth control </li></ul></ul>
    14. 14. Dedicated Communication Peripherals <ul><li>Full Speed USB device </li></ul><ul><ul><li>8 bi-directional data end points + 1 control end point </li></ul></ul><ul><ul><li>No external crystal required </li></ul></ul><ul><ul><li>Drivers in PSoC Creator for HID class devices </li></ul></ul><ul><li>Full CAN 2.0b </li></ul><ul><ul><li>16 RX buffers and 8 TX buffers </li></ul></ul><ul><li>I2C Master or Slave </li></ul><ul><ul><li>Data rate up to 400 kbps </li></ul></ul><ul><ul><li>Additional I2C slaves may be implemented in UDB array </li></ul></ul><ul><li>New peripherals will be added as family members are added to the platform: Ethernet, HS USB, USB Host. </li></ul>
    15. 15. PSoC Creator Design Flow <ul><li>Configure </li></ul><ul><ul><li>Start a new project </li></ul></ul><ul><ul><li>Place components </li></ul></ul><ul><ul><li>Configure components </li></ul></ul><ul><ul><li>Connect components </li></ul></ul><ul><li>Develop </li></ul><ul><ul><li>Build hardware design and </li></ul></ul><ul><ul><ul><li>Generate component APIs </li></ul></ul></ul><ul><ul><li>Write application code utilizing </li></ul></ul><ul><ul><ul><li>Component APIs </li></ul></ul></ul><ul><ul><li>Compile, build and program </li></ul></ul><ul><li>Debug </li></ul><ul><ul><li>Perform in-circuit debug using PSoC Creator </li></ul></ul><ul><li>Reuse </li></ul><ul><ul><li>Capture working hardware/software designs as your own components for future use </li></ul></ul>
    16. 16. Features of CY8CKIT-001 <ul><li>The CY8CKIT-001 PSoC Development Kit is designed to aid hardware, firmware, and software developers in building their own systems around Cypress’s PSoC, PSoC3, and PSoC5 architectures. </li></ul><ul><li>Development board provides the flexibility to configure the power domains. Input power to the board can be provided in one of two ways: </li></ul><ul><ul><li>12V 1A wall wart power supply </li></ul></ul><ul><ul><li>9V alkaline battery </li></ul></ul><ul><li>Three onboard linear regulators that can be used to power peripherals and PSoC modules at voltages between 1.7V and 5.5V. </li></ul><ul><li>The board also provides the ability to separate the PSoC core V CC rail into two separate rails, analog and digital. </li></ul><ul><li>2x16 alphanumeric LCD module capable of 1.8V to 5.5V I/O </li></ul><ul><li>Mini-B full speed USB interface, a female DB9 serial communications interface, and a 12-pin wireless radio module interface </li></ul>
    17. 17. CY8CKIT-001 PSoC® Development Kit <ul><li>The kit contains: </li></ul><ul><li>PSoC Development Board test </li></ul><ul><li>PSoC CY8C28 Family Processor Module </li></ul><ul><li>PSoC CY8C38 Family Processor Module </li></ul><ul><li>PSoC CY8C55 Family Processor Module </li></ul><ul><li>MiniProg3 Debug and Evaluation Device </li></ul><ul><li>Prototyping Cable Kit </li></ul><ul><li>USB Cable </li></ul><ul><li>12V AC Power Adapter </li></ul><ul><li>Quick Start Guide </li></ul><ul><li>Kit CDs, which includes: PSoC Creator™, PSoC Designer™, PSoC Programmer, Projects, and Documentation </li></ul>
    18. 18. CY8CKIT-014 PSoC® 5 FirstTouch™ Starter Kit
    19. 19. Features of CY8CKIT-014 Kit <ul><li>PSoC Creator development software with an integrated, GCC compiler version 4.2.1 </li></ul><ul><li>USB-based Serial Wire Debugging protocol programmer and debug interface </li></ul><ul><li>Accelerometer analog sensor </li></ul><ul><li>Thermistor analog sensor </li></ul><ul><li>Proximity analog sensor </li></ul><ul><li>CapSense® analog touch-sensing interface </li></ul><ul><li>28-pin general purpose I/O pins </li></ul><ul><li>12-pin wireless module header </li></ul><ul><li>Kit Contents </li></ul><ul><li>Evaluation Board </li></ul><ul><li>Quick Start Guide </li></ul><ul><li>Kit CD </li></ul><ul><li>USB A to Mini B cable </li></ul><ul><li>Proximity wire (for use as proximity detection antenna) </li></ul><ul><li>9V battery </li></ul>
    20. 20. Additional Resource <ul><li>For ordering PSoC 5 devices, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http:// www.cypress.com /?id=2233&source=header </li></ul></ul><ul><li>Visit Element 14 to post your question </li></ul><ul><ul><li> www.element-14.com </li></ul></ul><ul><li>For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility </li></ul>

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