Defense Dunisha Presentation

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M.E.Sc. Defense presentation, University of Western Ontario, London, ON, Canada

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Defense Dunisha Presentation

  1. 1. M.E.Sc. Thesis WijeratneOutline A Three-Phase AC-DC Single-Stage ZVZCSIntroduction PWM Full-Bridge ConverterLiterature ReviewThesis ObjectivesFundamentalPrinciples M.E.Sc Public LectureThe Proposed Summer 2009ConverterConverterAnalysisConverter Design Dunisha Wijeratne& Experimental Student Number: 250442424WaveformsConclusion University of Western Ontario, London, Ontario, Canada 2009 August 04
  2. 2. M.E.Sc. Thesis Outline 2 WijeratneOutlineIntroduction IntroductionLiterature ReviewThesis Objectives Literature ReviewFundamentalPrinciples Thesis ObjectivesThe ProposedConverter Fundamental PrinciplesConverterAnalysisConverter Design The Proposed Converter& ExperimentalWaveforms Converter AnalysisConclusion Converter Design & Experimental Waveforms Conclusion
  3. 3. M.E.Sc. Thesis Acknowledgements 3 WijeratneOutline I appreciate the support given by everybody to accomplishIntroduction my Masters.Literature Review My supervisor Dr. Gerry MoschopoulosThesis ObjectivesFundamental My thesis examination committee, Dr. Abbas Samani,Principles Dr. Jagath Samarabandu, Dr. Kazimierz Adamiak andThe ProposedConverter Dr. Mile Ostojic.ConverterAnalysis Dr. S. Kumarawadu of University of MoratuwaConverter Design& Experimental My senior Dr. Sondeep BassanWaveformsConclusion Gerrit Aartsen, Eugen Porter and Trent Steensman in the Electronics Shop Administrative staff of the ECE department My Parents.
  4. 4. M.E.Sc. Thesis Introduction 4 Wijeratne Introduction to Power ElectronicsOutlineIntroduction Power electronics is the field of electrical engineering relatedLiterature Review to the use of semiconductor devices to convert power fromThesis Objectives the form available from a source to that required by a load.Fundamental A block diagram of a typical power electronic system isPrinciples shown in the figure below.The ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  5. 5. M.E.Sc. Thesis Introduction 5 Wijeratne Semiconductor DevicesOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms MOSFET symbol IGBT symbolConclusion Applications: MOSFETs: Low power & High switching frequency IGBTs : Low switching & High power
  6. 6. M.E.Sc. Thesis Introduction 6 Wijeratne Soft Switching TechniquesOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design Soft switching techniques used are classified as& ExperimentalWaveforms Zero-voltage switching (ZVS) orConclusion Zero-current switching (ZCS). MOSFETs have a significant drain-source capacitance, hence usually implemented with ZVS. IGBTs have a slower turn-off, hence usually implemented with ZCS.
  7. 7. M.E.Sc. Thesis Introduction 7 Wijeratne Ac-Dc Two-Stage Power ConversionOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciples Stage 1- Six-switch rectifier.The ProposedConverter Stage 2- Full-bridge converter(FBC) for higher powerConverterAnalysis applications.Converter Design& Experimental ExampleWaveformsConclusion
  8. 8. M.E.Sc. Thesis Introduction 8 Wijeratne Problem StatementOutlineIntroduction The standard practice is to use two separate powerLiterature Review converters to convert an ac input voltage to a desired &Thesis Objectives isolated dc output voltage, where the front end converter isFundamentalPrinciples performing the power factor correction(PFC) & backThe Proposed converter is performing the isolation.ConverterConverterAnalysis SolutionConverter Design& Experimental A new 3-phase, single-stage ac-dc full-bridge converter isWaveforms proposed in the thesis that is cost effective, relatively simpleConclusion in design & which can be switched using standard PWM techniques. Goto S6
  9. 9. M.E.Sc. Thesis Introduction 8 Wijeratne Problem StatementOutlineIntroduction The standard practice is to use two separate powerLiterature Review converters to convert an ac input voltage to a desired &Thesis Objectives isolated dc output voltage, where the front end converter isFundamentalPrinciples performing the power factor correction(PFC) & backThe Proposed converter is performing the isolation.ConverterConverterAnalysis SolutionConverter Design& Experimental A new 3-phase, single-stage ac-dc full-bridge converter isWaveforms proposed in the thesis that is cost effective, relatively simpleConclusion in design & which can be switched using standard PWM techniques. Goto S6
  10. 10. M.E.Sc. Thesis Introduction 9 Wijeratne Full-Bridge Converter OperationOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design S1 & S2 are on;& ExperimentalWaveforms Transformer Voltage= +veConclusion Power Transfer Mode S2 is off, the body-diode of S3 & S1 are on Transformer Voltage= 0 Freewheeling Mode
  11. 11. M.E.Sc. Thesis Introduction 10 Wijeratne Dc-Dc Full-Bridge Converter (Contd)OutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design S1 is off & the body-diode of S4 & S3 are on& ExperimentalWaveforms Transformer Voltage= −veConclusion Power Transfer Mode S3 is off & the body-diode of S2 & S4 are on Transformer Voltage= 0 Freewheeling Mode Goto S1
  12. 12. M.E.Sc. Thesis Introduction 11 Wijeratne Phase-Shift Pulse Width ModulationOutlineIntroduction The output dc voltage is controlled by controlling theLiterature Review width of the +ve & −ve voltage pulses relative to theThesis Objectives zero voltage portions of the transformer.Fundamental This is done by shifting the gating signal pulses of thePrinciples switches in one leg, relative to those of the switches inThe ProposedConverter the other leg.ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion This is considered to be the standard controlling of a dc-dc full-bridge converter.
  13. 13. M.E.Sc. Thesis Literature Review 12 WijeratneOutline Ac-Dc Front-End ConvertersIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design The Standard practice- 6-switch ac-dc Rectifier& ExperimentalWaveforms Converter.Conclusion Disadvantage: Too many switches lead to complication & cost increase.
  14. 14. M.E.Sc. Thesis Literature Review 13 Wijeratne Modular ApproachOutlineIntroduction Each module is 2-staged, where PFC boost converter isLiterature Review followed by a dc-dc converter.Thesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Advantage: Available single-phase modules can be used. Disadvantage: The operation of each module should be synchronized with respect to others.
  15. 15. M.E.Sc. Thesis Literature Review 14 Wijeratne Reduced Switch Front-end RectifiersOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design Advantage:& ExperimentalWaveforms Ac-dc rectifier switches are reduced to 4.Conclusion Disadvantages: Still requires 7 or 8 switches in total. 2-stage power conversion.
  16. 16. M.E.Sc. Thesis Literature Review 15 Wijeratne Three-phase Single-Switch Ac-Dc Front-end RectifierOutlineIntroduction There are 2 types:Literature Review Boost (step-up) converterThesis Objectives Buck (step-down) converterFundamentalPrinciples Boost converter operation:The Proposed When S is on, each line inductor current rises to a peakConverter proportional to the voltage applied in that switch cycle.ConverterAnalysis When S is off, inductors discharge into the outputConverter Design capacitor, currents fall to zero.& ExperimentalWaveformsConclusion Single-switch boost converter Inductor current
  17. 17. M.E.Sc. Thesis Literature Review 16 Wijeratne Three-phase Single-Switch Ac-Dc Front-end RectifierOutlineIntroduction Operation of Buck ConverterLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverter Single-switch buck converter Capacitor voltageAnalysisConverter Design& Experimental When the switch is on input capacitors (Ca , Cb , & Cc )Waveforms discharge into the load.Conclusion Capacitors charge with line currents when the switch is off. For PFC at the input side input capacitors must be discontinuous. Discontinuous capacitor voltage is bounded by the sinusoidal average.
  18. 18. M.E.Sc. Thesis Literature Review 17 Wijeratne Three-Phase Single-Stage Ac-Dc ConvertersOutlineIntroduction Single-stage converter: A single converter performs bothLiterature Review functions of PFC & dc-dc isolation.Thesis Objectives Plenty of research on low power, single-stage converters,FundamentalPrinciples but inadequate research on 3-phase, single-stageThe Proposed converters.ConverterConverter This is because of the challenges of merging PFC &Analysis dc-dc conversion over a much wider load range thanConverter Design& Experimental what the low power converters encounter.WaveformsConclusion There are many drawbacks associated with the existing single-stage converters.
  19. 19. M.E.Sc. Thesis Literature Review 18 Wijeratne Some Examples-Three-Phase Single-Stage ConvertersOutlineIntroduction Example 1Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  20. 20. M.E.Sc. Thesis Literature Review 18 Wijeratne Some Examples-Three-Phase Single-Stage ConvertersOutlineIntroduction Example 2Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  21. 21. M.E.Sc. Thesis Literature Review 18 Wijeratne Some Examples-Three-Phase Single-Stage ConvertersOutlineIntroduction Example 3Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  22. 22. M.E.Sc. Thesis Literature Review 18 Wijeratne Some Examples-Three-Phase Single-Stage ConvertersOutlineIntroduction Example 4Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  23. 23. M.E.Sc. Thesis Thesis Objectives 19 WijeratneOutline To propose a new 3-phase, ac-dc, single-stage, PWMIntroduction converter that can operate with an excellent input powerLiterature Review factor & that does not have the disadvantages of theThesis Objectives existing 3-phase single-stage converters.FundamentalPrinciplesThe Proposed To analyze its steady-state operation & determine itsConverter steady-state characteristics.ConverterAnalysisConverter Design To develop guidelines & a procedure for designing the& ExperimentalWaveforms proposed converter.Conclusion To confirm its feasibility with results obtained from a experimental prototype.
  24. 24. M.E.Sc. Thesis Fundamental Principles 20 WijeratneOutline The proposed single-stage converter is based on theIntroduction combination ofLiterature Review A single-switch 3-phase buck converter,Thesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  25. 25. M.E.Sc. Thesis Fundamental Principles 20 WijeratneOutline The proposed single-stage converter is based on theIntroduction combination ofLiterature Review A single-switch 3-phase buck converter,Thesis ObjectivesFundamental A dc-dc zero-voltage-zero-current switched (ZVZCS)PrinciplesThe Proposed full-bridge converter.ConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  26. 26. M.E.Sc. Thesis Fundamental Principles 20 WijeratneOutline The proposed single-stage converter is based on theIntroduction combination ofLiterature Review A single-switch 3-phase buck converter,Thesis ObjectivesFundamental A dc-dc zero-voltage-zero-current switched (ZVZCS)PrinciplesThe Proposed full-bridge converter.ConverterConverter Ac-Dc Three-Phase Single-Switch Buck ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  27. 27. M.E.Sc. Thesis Fundamental Principles 21 Wijeratne Three-Phase Single-Switch Buck Converter-Modes ofOutline OperationIntroduction During a typical switching cycle, the converter goes throughLiterature Review 3 significant modes of operation: Goto 20Thesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms Mode 1 Mode 2Conclusion Mode 3
  28. 28. M.E.Sc. Thesis Fundamental Principles 22 Wijeratne Input PFC in Single-Switch Buck ConverterOutlineIntroduction The input currents are sinusoidal & in phase with theLiterature Review input phase voltages if input capacitors completelyThesis Objectives discharge as shown. Goto 21FundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion When the average input capacitor voltages are sinusoidal, voltages across input inductors are sinusoidal.
  29. 29. M.E.Sc. Thesis Fundamental Principles 23 Wijeratne Dc-Dc Zero-Voltage-Zero-Current Switched (ZVZCS)Outline Full-Bridge ConverterIntroductionLiterature Review A conventional dc-dc FBC is essentially a buckThesis Objectives converter, but with transformer isolation.FundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms Dc-dc full-bridge converter Dc-dc buck converterConclusion In a typical FBC primary current flows in the reverse direction out of the converter & back into the source. If a FBC is to replace the the buck converter, then there cannot be a reverse current.
  30. 30. M.E.Sc. Thesis Fundamental Principles 24 Wijeratne Can ZVZCS Full-Bridge Converter replace Single-SwitchOutline Buck Converter?IntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms A ZVZCS converter has the property that most of theConclusion circulating primary current when it is in a freewheeling mode can be extinguished, so there is no current in the anti-parallel diodes of the switches when the converter exits a freewheeling mode.
  31. 31. M.E.Sc. Thesis Fundamental Principles 25 Wijeratne Dc-Dc ZVZCS Full-Bridge ConverterOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms Similar to conventional dc-dc FBC, except for theConclusion passive circuit of Cx , Dc & Dd . Cx impresses a counter voltage across the transformer primary during a freewheeling mode to extinguish the circulating current.
  32. 32. M.E.Sc. Thesis Fundamental Principles 26 Wijeratne Dc-Dc ZVZCS FBC Modes of OperationOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciples Mode 1 (t0 < t < t1 )The ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms Mode 2 (t1 < t < t2 )Conclusion Mode 3 (t2 < t < t3 ) Goto S2
  33. 33. M.E.Sc. Thesis Fundamental Principles 27 Wijeratne Dc-Dc ZVZCS FBC Modes of OperationOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciples Mode 4 (t3 < t < t4 )The ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms Mode 5 (t4 < t < t5 )Conclusion Mode 6 (t5 < t < t6 ) Goto 26
  34. 34. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 28OutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms The converter consists of a 3-phase L-C filter, a 3-phaseConclusion diode bridge rectifier, & a ZVZCS full-bridge converter. The most important thing to note is that the FBC acts like the switch in the 3-phase, single switch, ac-dc buck converter.
  35. 35. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 29Outline ComparisonIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Power Transfer Mode
  36. 36. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 29Outline ComparisonIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Freewheeling Mode
  37. 37. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 30OutlineIntroduction Modes of Operation Mode 1 (t0 < t < t1 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms At t = t0 , S2 is on with ZCS & current If b , flows intoConclusion the FBC. If b is made of the currents of the input capacitors & the input inductors. The transformer secondary current charges the auxiliary capacitor, Cx through diode Dc .
  38. 38. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 31OutlineIntroduction Mode 2 (t1 < t < t2 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms At t = t1 , Ca , Cb , Cc are fully discharged & the dc busConclusion voltage is zero. Since Ca no longer provides current into the FBC, If b , is constant & equals Ia . The t/f leakage inductor (Llk ) current drops due to the impressed counter voltage across Llk by Cx . Cx continues to charge & mode ends at t = t2 when S1 is off.
  39. 39. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 32OutlineIntroduction Mode 3 (t2 < t < t3 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms At t = t2 , the capacitors of S1 & S4 charge & dischargeConclusion respectively. The current in the FBC continues to decrease. Since ILlk drops below that coming from the input inductors, Ia starts to flow into Ca . During mode 3, the capacitor across S4 , is fully discharged & its body diode starts to conduct.
  40. 40. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 33OutlineIntroduction Mode 4 (t3 < t < t4 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms At t = t3 , S4 is tuned on with ZVS.Conclusion The t/f primary current, ILlk freewheels through the 2 bottom switches & continue to decrease. Entire input inductor currents flow through the input capacitors. The mode ends when diode Dd begins to conduct & discharge Cx .
  41. 41. M.E.Sc. Thesis A New Three-Phase Single-Stage ZVZCS Wijeratne Ac-Dc Converter 34OutlineIntroduction Mode 5 (t4 < t < t5 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveforms At t = t5 , there is no current flowing in the t/f primary.Conclusion This allows S2 to be turned off with ZCS. The input capacitors charge & Cx discharges via Dd .
  42. 42. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 35OutlineIntroduction Mode 6 (t5 < t < t6 )Literature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& Experimental At t = t5 , ILlk is zero & Cx continues to discharge asWaveformsConclusion the entire load current flows through it. Input capacitors continue to charge. At t = t6 , S3 is turned on with ZCS & current starts to flow through S3 & S4 . The converter will then go through the same modes of operation for the remaining half cycle. Goto S2
  43. 43. M.E.Sc. Thesis A New Three-Phase Single-Stage Ac-Dc Wijeratne ZVZCS Converter 36Outline Converter FeaturesIntroductionLiterature Review The converter can operate with standard phase-shiftThesis Objectives PWM.FundamentalPrinciples The input currents are continuous; do not have a veryThe ProposedConverter large ripple, therefore additional input filtering isConverter avoided.AnalysisConverter Design& Experimental Since the input currents are continuous, theWaveforms semiconductor peak current stresses are not excessive.Conclusion The converter does not have the circulating current in a freewheeling mode so fewer conduction losses. The converter is inexpensive & simple.
  44. 44. M.E.Sc. Thesis Converter Analysis 37 WijeratneOutline Purpose: to derive expressions and determine relationsIntroduction of key converter parameters.Literature Review Relations obtained can then be used to draw theThesis Objectives characteristic curves which would aid the design process.FundamentalPrinciples Input Capacitor Relations-Input Capacitor & Peak SwitchThe Proposed VoltageConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion The input capacitors must be discontinuous in order have a good PF at input side. Smaller capacitors would operate in discontinuous voltage mode (DVM) throughout the line cycle.
  45. 45. M.E.Sc. Thesis Converter Analysis 38 Wijeratne Input Capacitor & Peak Switch Voltage (Contd)OutlineIntroduction Ca , however, cannot be too small as it determines theLiterature Review peak voltage stress of the switches.Thesis Objectives The conflicting criteria of having an excellent input PFFundamental & not having excessive switch stress must be consideredPrinciplesThe Proposed when implementing the converter.Converter The input currents may not be perfectly sinusoidal, butConverterAnalysis should meet the appropriate standards if it is to be usedConverter Design in the industry.& ExperimentalWaveformsConclusion Input Capacitor & Output Dc Voltage Ca also affects the output dc voltage Vo . Ca affects the shape of the dc bus voltage, Vbus & Vo is dependent on the average Vbus .
  46. 46. M.E.Sc. Thesis Converter Analysis 39 Wijeratne Input Capacitor & Output Dc VoltageOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design In a standard dc-dc FBC, the ratio of Vo to Vbus can be& ExperimentalWaveforms expressed as in (1):Conclusion Vo = nD (1) Vbus,ave Therefore, Ca should also be selected such that, Vbus is sufficient enough to give required Vo to the load.
  47. 47. M.E.Sc. Thesis Converter Analysis 40 Wijeratne Input Capacitors, Voltage Ratio V & Duty Ratio DOutlineIntroduction After a thorough analysis, a relation between D, V & KLiterature Review as in (2) is obtained.Thesis Objectives 1 ηFundamental V = (2)Principles (1 − D) KThe ProposedConverter Where K is defined as,ConverterAnalysis TsConverter Design K=& Experimental 2RCWaveformsConclusion
  48. 48. M.E.Sc. Thesis Converter Analysis 41 Wijeratne Voltage Conversion Ratio(V ) vs. Duty Ratio(D)OutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion To compromise between the switch stress & input PF, Ca is selected so that VCa drops to zero just at the end of an energy transfer mode then immediately rises when the converter enters a freewheeling mode.
  49. 49. M.E.Sc. Thesis Converter Analysis 42 Wijeratne Input Inductor RelationOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design Figure above shows a per phase equivalent circuit of L-C& ExperimentalWaveforms filter section which is helpful to find the relationship (3)Conclusion between Ca , La & line current harmonics. 2 Itfr 1 La Ca = 1+ (3) 2πfr 0.2Itfr
  50. 50. M.E.Sc. Thesis Converter Analysis 43 Wijeratne Transformer Leakage Inductor RelationsOutlineIntroduction The t/f leakage inductance Llk prevents the prematureLiterature Review charging of the input capacitors.Thesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design Discontinuous input Capacitor voltage Transformer equivalent circuit& ExperimentalWaveforms In order to slow down the rate of discharge of Ca , timeConclusion constant, TC should be selected closer to the duration of energy transfer mode as in (4). VBDV M Ts Llk Ca ≥ · (4) n 2
  51. 51. M.E.Sc. Thesis Converter Analysis 44 Wijeratne Leakage Inductance vs. Input CapacitorsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  52. 52. M.E.Sc. Thesis Converter Analysis 45 Wijeratne Auxiliary Capacitor RelationsOutlineIntroduction The main function of Cx is to extinguish the primaryLiterature Review current in the transformer.Thesis Objectives Cx is selected considering equilibrium between theFundamental energy stored & energy supplied by Cx to the load & toPrinciples Llk .The ProposedConverter 1Converter Cx VCx,pk 2 − VCx,min 2 =Analysis 2 1Converter Design& Experimental .Llk n.IL0 2Waveforms 2 TsConclusion + R.IL0 2 − t4 2 Goto S4
  53. 53. M.E.Sc. Thesis Design & Experimental Results 46 WijeratneOutline Design Specification Converter ParametersIntroductionLiterature Review Input voltage: 208 Vll,rms Duty ratio: D=0.55Thesis Objectives Turns ratio: n= 0.3FundamentalPrinciples Line frequency: 60 Hz Input capacitors: Ca = Cb =The Proposed Cc = 60nFConverter Output voltage: Vo = 48 Vdc Input inductors: La = Lb =ConverterAnalysis Lc =250 µHConverter Design& Experimental Leakage inductance:Waveforms Output power: 1.92 kW Llk =30 µHConclusion Auxiliary capacitor: Switching frequency: Cx =38 µF fs =50 kHz Peak switch voltage stress: Vsw,pk =1026 V
  54. 54. M.E.Sc. Thesis Design & Experimental Results 46 WijeratneOutline Design Specification Converter ParametersIntroductionLiterature Review Input voltage: 208 Vll,rms Duty ratio: D=0.55Thesis Objectives Turns ratio: n= 0.3FundamentalPrinciples Line frequency: 60 Hz Input capacitors: Ca = Cb =The Proposed Cc = 60nFConverter Output voltage: Vo = 48 Vdc Input inductors: La = Lb =ConverterAnalysis Lc =250 µHConverter Design& Experimental Leakage inductance:Waveforms Output power: 1.92 kW Llk =30 µHConclusion Auxiliary capacitor: Switching frequency: Cx =38 µF fs =50 kHz Peak switch voltage stress: Vsw,pk =1026 V
  55. 55. M.E.Sc. Thesis Design & Experimental Results 46 WijeratneOutline Design Specification Converter ParametersIntroductionLiterature Review Input voltage: 208 Vll,rms Duty ratio: D=0.55Thesis Objectives Turns ratio: n= 0.3FundamentalPrinciples Line frequency: 60 Hz Input capacitors: Ca = Cb =The Proposed Cc = 60nFConverter Output voltage: Vo = 48 Vdc Input inductors: La = Lb =ConverterAnalysis Lc =250 µHConverter Design& Experimental Leakage inductance:Waveforms Output power: 1.92 kW Llk =30 µHConclusion Auxiliary capacitor: Switching frequency: Cx =38 µF fs =50 kHz Peak switch voltage stress: Vsw,pk =1026 V
  56. 56. M.E.Sc. Thesis Design & Experimental Results 47 Wijeratne Experimental PrototypeOutlineIntroductionLiterature Review MOSFETs: IXFN32N120-NDThesis ObjectivesFundamentalPrinciples IGBTs: IXDH20N120-NDThe ProposedConverterConverterAnalysis Secondary side diodes: RHRP1560Converter Design& ExperimentalWaveforms 3-phase diode rectifier: 36MT160Conclusion It should be noted that the experimental waveforms will be compared to waveforms obtained with PSIM, well-known, commercially available power electronics software.
  57. 57. M.E.Sc. Thesis Design & Experimental Results 48 Wijeratne ZVS Leg WaveformsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Simulation: Switch voltage(top) & current(bottom) [V: 250V/div, I: 10A/div, t: 5µs/div]ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Experimental: Switch voltage(top) & switch current(bottom) [V: 500V/div, I: 25A/div, t: 2.5µs/div]
  58. 58. M.E.Sc. Thesis Design & Experimental Results 48 Wijeratne ZVS Leg WaveformsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Simulation: Gate pulse(top) & switch current(bottom) [V: 5V/div, I: 10A/div, t: 1µs/div]ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Experimental: Gate pulse (top) and switch current (bottom)[V: 25V/div, I: 25A/div, t: 1µs/div]
  59. 59. M.E.Sc. Thesis Design & Experimental Results 49 Wijeratne ZCS Leg WaveformsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Simulation: Switch voltage (top) & switch current (bottom) [V: 250V/div, I: 5A/div, t: 5 µs/div]ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Experimental: Switch voltage (top) & switch current (bottom) [V: 500V/div, I: 25A/div, t: 5 µs/div]
  60. 60. M.E.Sc. Thesis Design & Experimental Results 49 Wijeratne ZCS Leg WaveformsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Simulation: Gate pulse (top) & switch current (bottom) [V: 5V/div, I: 10A/div, t: 5µs/div]ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Experimental: Gate pulse (top) & switch current (bottom) [V: 25V/div, I: 10A/div, t: 5µs/div]
  61. 61. M.E.Sc. Thesis Design & Experimental Results 50 Wijeratne Input Voltage & Current WaveformsOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Simulation: Input phase voltage & input phase current [V: 100V/div, I: 20A/div, t: 4ms/div]ConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Experimental: Input phase voltage & input phase current [V: 75V/div, I: 10A/div, t: 4ms/div]
  62. 62. M.E.Sc. Thesis Design & Experimental Results 51 Wijeratne Input Capacitor Voltage Waveforms- Over SeveralOutline Switching CyclesIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysis Simulation: Input capacitor voltage measured across Ca [V: 200V/div, t=5ms/div]Converter Design& ExperimentalWaveformsConclusion Experimental: Input capacitor voltage measured across Ca [V: 200V/div, t=5ms/div]
  63. 63. M.E.Sc. Thesis Design & Experimental Results 52 Wijeratne Input Capacitor Voltage Waveforms- Over Several LineOutline CyclesIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysis Simulation: Input capacitor voltage measured across Ca [V: 200V/div, t=4ms/div]Converter Design& ExperimentalWaveformsConclusion Experimental: Input capacitor voltage measured across Ca [V: 200V/div, t=4ms/div]
  64. 64. M.E.Sc. Thesis Conclusion 53 Wijeratne SummaryOutlineIntroduction The objective of this thesis was to propose, analyze,Literature Review design, implement, & experimentally confirm theThesis Objectives operation of a new three-phase, ac-dc, converter, whichFundamental does not have the drawbacks of previously proposedPrinciples circuits.The ProposedConverter In this thesis, a background study of the 3-phase ac-dcConverterAnalysis converters was carried out.Converter Design& Experimental The derivation of the proposed converter was presented.WaveformsConclusion The general operating principles of the converter were reviewed. The converter’s steady-state modal operation was discussed.
  65. 65. M.E.Sc. Thesis Conclusion 54 Wijeratne Summary (Contd)OutlineIntroduction Considering the relationships between key parametersLiterature Review graphs of steady-state characteristics were obtained.Thesis Objectives They were used as part of the design procedure to selectFundamentalPrinciples the key converter parameters.The ProposedConverter A prototype was built & its functionality was confirmedConverterAnalysis with simulation & obtained experimental results.Converter Design& ExperimentalWaveforms ConclusionConclusion It is possible to combine a 3-phase, single switch ac-dc buck converter with a dc-dc ZVZCS FBC to get a feasible 3-phase, single-stage, ac-dc converter. The converter can operate with a very good input PF as long as the input capacitor operate in DVM.
  66. 66. M.E.Sc. Thesis Conclusion (Contd) 55 Wijeratne ConclusionOutlineIntroduction Smaller the input capacitors, the better the input PF,Literature Review larger the maximum peak voltage of converter switches.Thesis Objectives A trade-off between peak switch voltage stress & inputFundamentalPrinciples PF is made.The ProposedConverter If Llk is too small, then the input capacitors may startConverterAnalysis to recharge while the converter is in an energy transferConverter Design mode.& ExperimentalWaveforms The input capacitors determine converter’s ability toConclusion produce the required output dc voltage. If they are too small, can’t store sufficient amount of energy during freewheeling which can be transferred during an energy transfer mode.
  67. 67. M.E.Sc. Thesis Conclusion 56 Wijeratne ContributionsOutlineIntroduction A new 3-phase, ac-dc, single-stage, ZVZCS full-bridgeLiterature Review PWM converter that can operate with an excellent inputThesis Objectives PF was proposed & its operation was explained.FundamentalPrinciples The steady-state operation was analyzed & itsThe ProposedConverter characteristics were determined.ConverterAnalysis A procedure for its design was derived & demonstrated.Converter Design& ExperimentalWaveforms The feasibility & the properties of the new converterConclusion were confirmed by simulation & by experimental results obtained from a prototype.
  68. 68. M.E.Sc. Thesis Conclusion 57 Wijeratne Proposal for Future WorkOutlineIntroduction The switches in the ZCS leg of the converter turn offLiterature Review with almost zero reverse current.Thesis Objectives This reverse current was absorbed by small, passive RCDFundamentalPrinciples snubber circuit connected across the dc bus.The ProposedConverter For future work, the dissipative snubber can be replacedConverter by suitable non-dissipative snubber to improve theAnalysis efficiency.Converter Design& ExperimentalWaveforms The lack of a dc bus capacitor in the proposed converterConclusion means that it cannot be used in applications as a stand alone converter if hold-up is required. For future work, some means to introduce energy storage at the dc bus can be investigated.
  69. 69. M.E.Sc. Thesis WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Thank youConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  70. 70. M.E.Sc. Thesis WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverter Supplementary SlidesConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  71. 71. M.E.Sc. Thesis Typical Full-Bridge Converter Waveforms WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  72. 72. M.E.Sc. Thesis Typical ZVZCS Converter Waveforms WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Return to 10
  73. 73. M.E.Sc. Thesis Typical Waveforms of the Proposed Wijeratne ConverterOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  74. 74. M.E.Sc. Thesis Converter Analysis Wijeratne Auxiliary Capacitor RelationsOutlineIntroduction The main function of Cx is to extinguish the primaryLiterature Review current in the transformer.Thesis Objectives Cx is selected considering equilibrium (5) between theFundamental energy stored & energy supplied by Cx to the load & toPrinciples Llk .The Proposed 1Converter Cx VCx,pk 2 − VCx,min 2 =Converter 2Analysis 1Converter Design .Llk n.IL0 2& Experimental 2Waveforms TsConclusion + R.IL0 2 − t4 2 Yields to, 1 Ts 2 .Llk n.IL0 2 + R.IL0 2 2 − t4 Cx = 2 · (5) VCx,pk 2 − VCx,min 2 Return to 45
  75. 75. M.E.Sc. Thesis Converter Analysis Wijeratne Boundary Discontinuous Voltage ModeOutlineIntroduction The converter can be said to be operating in boundaryLiterature Review discontinuous voltage mode (BDVM).Thesis Objectives 1Fundamental KBDV M = (6)Principles n2 D2 (1 − D)2The ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion
  76. 76. M.E.Sc. Thesis Costing of the Proposed Converter WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Return to 8 Go to S7
  77. 77. M.E.Sc. Thesis Cost Comparison WijeratneOutlineIntroductionLiterature ReviewThesis ObjectivesFundamentalPrinciplesThe ProposedConverterConverterAnalysisConverter Design& ExperimentalWaveformsConclusion Return to S6

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