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  1. 1. Arithmetic and Logic Instructions A Course in Microprocessor Electrical Engineering Department University of Indonesia
  2. 2. Addition-Subtraction-Comparison <ul><ul><li>Whenever arithmetic and logic instruction execute, the contents of the flag register change </li></ul></ul><ul><li>Addition </li></ul><ul><ul><li>Table 5.1 illustrates the addressing modes available to the ADD instructions </li></ul></ul><ul><ul><li>Register Addition </li></ul></ul><ul><ul><ul><li>Example 5.1 show a sample of register addition </li></ul></ul></ul><ul><ul><li>Immediate Addition </li></ul></ul><ul><ul><ul><li>Example 5.2 shows 8-bit immediate addition example </li></ul></ul></ul>
  3. 3. Addition-Subtraction-Comparison (cont’d) <ul><ul><li>Memory-to-Register Addition </li></ul></ul><ul><ul><ul><li>Example 5.3 adds two consecutive bytes of data </li></ul></ul></ul><ul><ul><li>Array Addition </li></ul></ul><ul><ul><ul><li>Example 5.4 shows a procedure that adds the contents of array elements 3, 5, and 7 </li></ul></ul></ul><ul><ul><ul><li>Example 5.5 shows the scaled-index form of addressing to add elements 3, 5, and 7 of an area of memory called ARRAY </li></ul></ul></ul><ul><ul><li>Increment Addition </li></ul></ul><ul><ul><ul><li>Examples 5.6 modifies example 5.3 to use the increment instruction for addressing NUMB and NUMB+1 (see also Table 5.2 ) </li></ul></ul></ul>
  4. 4. Addition-Subtraction-Comparison (cont’d) <ul><ul><li>Addition-with-Carry </li></ul></ul><ul><ul><ul><li>Table 5.3 lists several add-with-carry instruction </li></ul></ul></ul><ul><ul><ul><li>Figure 5.1 illustrates the addition </li></ul></ul></ul><ul><ul><ul><li>Ex. 5.7 and Ex. 5.8 show the short program </li></ul></ul></ul><ul><li>Subtraction </li></ul><ul><ul><li>Table 5.4 shows addressing modes for the subtraction instruction </li></ul></ul><ul><ul><li>Register Subtraction </li></ul></ul><ul><ul><ul><li>Example 5.9 </li></ul></ul></ul><ul><ul><li>Immediate Subtraction </li></ul></ul><ul><ul><ul><li>Example 5.10 </li></ul></ul></ul>
  5. 5. Addition-Subtraction-Comparison (cont’d) <ul><ul><li>Decrement Subtraction </li></ul></ul><ul><ul><ul><li>It subtracts a 1 from a register or the contents of a memory location (see Table 5.5 ) </li></ul></ul></ul><ul><ul><li>Subtract-with-Borrow </li></ul></ul><ul><ul><ul><li>It functions as a regular subtraction, except that the carry flag (C) which holds the borrow, also subtracts from the difference (see Table 5.6 & Ex. 5.11 ) </li></ul></ul></ul><ul><li>Comparison </li></ul><ul><ul><li>The comparison instruction (CMP) is a subtraction that changes only the flag bits </li></ul></ul><ul><ul><li>See Table 5.7 and Example 5.12 </li></ul></ul>
  6. 6. Multiplication and Division <ul><ul><li>Only modern  p contain multiplication and division instructions </li></ul></ul><ul><li>Multiplication </li></ul><ul><ul><li>multiplication (bytes, words, or double-words) can be signed integer (IMUL) or unsigned (MUL) </li></ul></ul><ul><ul><li>8-bit Multiplication </li></ul></ul><ul><ul><ul><li>The multiplicand is always in the register AL </li></ul></ul></ul><ul><ul><ul><li>See Table 5.8 and Example 5.13 </li></ul></ul></ul><ul><ul><li>16-bit Multiplication </li></ul></ul><ul><ul><ul><li>AX contains the multiplicand and the product appears in DX-AX </li></ul></ul></ul>
  7. 7. Multiplication and Division (cont’d) <ul><ul><li>32-bit Muliplication </li></ul></ul><ul><ul><ul><li>The contents of EAX are multiplied by the operand specified with the instruction </li></ul></ul></ul><ul><ul><ul><li>The product (64-bits wide) is found in EDX-EAX where EAX contains the LS32B (see Table 5.10) </li></ul></ul></ul><ul><li>Division </li></ul><ul><ul><li>None of the flag bits change predictably; i.e., a division can result is two different types of error: </li></ul></ul><ul><ul><ul><li>an attempt to divide by zero </li></ul></ul></ul><ul><ul><ul><li>a divide overflow (see the 3rd paragraph in p.157) </li></ul></ul></ul><ul><ul><ul><li>In both cases, the  p generates an interrupt if a divide error occurs </li></ul></ul></ul>
  8. 8. Multiplication and Division (cont’d) <ul><ul><li>8-bit Division </li></ul></ul><ul><ul><ul><li>The AX register stores the dividend </li></ul></ul></ul><ul><ul><ul><li>After the division, AL contains the quotient and AH contains a whole number remainder </li></ul></ul></ul><ul><ul><ul><li>See Table 5.11, Example 5.14 & Example 5.15 </li></ul></ul></ul><ul><ul><li>16-bit Division </li></ul></ul><ul><ul><ul><li>Instead of dividing into AX, the 16-bit number is divided into DX-AX, a 32-bit dividend </li></ul></ul></ul><ul><ul><ul><li>The quotient appears in AX and the remainder in DX after a 16-bit division </li></ul></ul></ul><ul><ul><ul><li>See Table 5.12 and Example 5.16 </li></ul></ul></ul>
  9. 9. Multiplication and Division (cont’d) <ul><ul><li>32-bit Division </li></ul></ul><ul><ul><ul><li>The 64-bit contents of EDX-EAX are divided by the operand specified by the instruction, leaving a 32-bit quotient in EAX and a 32-bit remainder in EDX </li></ul></ul></ul><ul><ul><ul><li>See Table 5.13 </li></ul></ul></ul><ul><ul><li>The Remainder </li></ul></ul><ul><ul><ul><li>After a division, the remainder could be use to round the result or dropped to truncate the result or conver-ted to a fractional remainder </li></ul></ul></ul><ul><ul><ul><li>Study Example 5.17 and Example 5.18 </li></ul></ul></ul>
  10. 10. BCD and ASCII Arithmetic <ul><li>BCD Arithmetic </li></ul><ul><ul><li> p allows arithmetic manipulation of both BCD and ASCII </li></ul></ul><ul><ul><li>DAA (Decimal Adjust After Addition) Instruction </li></ul></ul><ul><ul><ul><li>It follows the ADD or ADC instruction to adjust the result into a BCD result ( Ex. 5.19 ) </li></ul></ul></ul><ul><ul><li>DAS (Decimal Adjust After Subtraction) Instruction </li></ul></ul><ul><ul><ul><li>It functions as does the DAA, except that it follows a subtraction instead of an addition ( Ex. 5.20 ) </li></ul></ul></ul>
  11. 11. BCD and ASCII Arithmetic (cont’d) <ul><li>ASCII Arithmetic </li></ul><ul><ul><li>AAA ( ASCII Adjust After Addition ) </li></ul></ul><ul><ul><ul><li>Example 5.21 </li></ul></ul></ul><ul><ul><li>AAD ( ASCII Adjust Before Division ) </li></ul></ul><ul><ul><ul><li>Example 5.22 </li></ul></ul></ul><ul><ul><li>AAM ( ASCII Adjust After Multiplication ) </li></ul></ul><ul><ul><ul><li>Example 5.23, Example 5.24 , Example 5.25 </li></ul></ul></ul><ul><ul><li>AAS ( ASCII Adjust After Subtraction ) </li></ul></ul><ul><ul><ul><li>Adjust the AX register after an ASCII subtraction </li></ul></ul></ul>
  12. 12. Basic Logic Instruction <ul><li>Logic operations provide binary bit control in low-level software; allow bits to be set, cleared, or complemented </li></ul><ul><li>AND </li></ul><ul><ul><ul><li>Performs logical multiplication as depicted by the truth table in Fig.5.3 and Fig . 5.4 </li></ul></ul></ul><ul><ul><ul><li>See also Ex. 5.26 and Table 5.14 </li></ul></ul></ul><ul><li>OR </li></ul><ul><ul><ul><li>Performs logical addition as depicted in Fig. 5.5 and Ex. 5.27 and Fig. 5.6 and Table 5.15 </li></ul></ul></ul><ul><li>X-OR </li></ul><ul><ul><ul><li>Study Fig. 5.7 , Table 5.16 and Ex 5.28 </li></ul></ul></ul>
  13. 13. Basic Logic Instruction (cont’d) <ul><li>Test and Bit Test Instruction </li></ul><ul><ul><ul><li>Test instruction performs the AND operation; the difference is that the AND instruction changes the destination operand, while the TEST does not </li></ul></ul></ul><ul><ul><ul><li>Test instruction affects only the flag ( Table 5.17 and Example 5.29 ) </li></ul></ul></ul><ul><ul><ul><li>Bit Test instruction tests single bit position (Table 5.18 and Example 5.30 </li></ul></ul></ul><ul><li>NOT and NEG </li></ul><ul><ul><ul><li>NOT performs logical inversion (1’s complement) and NEG performs arithmetic sign inversion (2’s complement) </li></ul></ul></ul>
  14. 14. Shift and Rotate <ul><ul><li>Shift and Rotate instructions manipulate binary numbers at the binary bit level </li></ul></ul><ul><ul><li>Shifts and Rotates find their most common application in low-level software used to control I/O devices </li></ul></ul><ul><li>Shifts </li></ul><ul><ul><ul><li>Shifts position or move numbers to the left or right within a register or memory location </li></ul></ul></ul><ul><ul><ul><li>Shifts also perform simple arithmetic such as multiplication by powers of 2 +n (left shift) and division by powers of 2 -n (right shift) </li></ul></ul></ul><ul><ul><ul><li>Study fig. 5.9 , Table 5.20 , Examples 5.31 & 5.32 </li></ul></ul></ul>
  15. 15. Shift and Rotate (cont’d) <ul><li>Rotate </li></ul><ul><ul><ul><li>Rotates position binary data by rotating the infromation in a register or memory location either from one end to another or through the carry flag </li></ul></ul></ul><ul><ul><ul><li>Rotates are often used to shift wide numbers to the left or right </li></ul></ul></ul><ul><ul><ul><li>Study Fig. 5.10 , Table 5.21 , Example 5.33 </li></ul></ul></ul><ul><li>Bit Scan Instructions </li></ul><ul><ul><ul><li>BSF (bit scan forward) and BSR (bit scan reverse) scan through a number searching for the first 1-bit encountered </li></ul></ul></ul>
  16. 16. String Comparisons <ul><li>It is very powerful because allows to manipulate large blocks of data with relative ease </li></ul><ul><li>SCAS </li></ul><ul><ul><li>SCAS compares the AL register with a byte block of memory ( SCASB ), the AX register with a word block of memory ( SCASW ), or the EAX register with a doubleword block of memory ( SCASD ) </li></ul></ul><ul><ul><li>study Example 5.34 and Example 5.35 </li></ul></ul><ul><li>CMPS </li></ul><ul><ul><li>It always compares two sections of memory data as bytes (CMPSB), word (CMPSW), or doubleword (CMPSD); Study Example 5.36 </li></ul></ul>