• Save
Coherency Challenges in Next Generation SoCs
Upcoming SlideShare
Loading in...5
×
 

Coherency Challenges in Next Generation SoCs

on

  • 532 views

With clusters of computation elements (e.g. CPUs, Video, Graphics) and increasing use of subsystems, how are the challenges of coherency in providing the right data at the right time dealt with at the ...

With clusters of computation elements (e.g. CPUs, Video, Graphics) and increasing use of subsystems, how are the challenges of coherency in providing the right data at the right time dealt with at the system level.



Statistics

Views

Total Views
532
Views on SlideShare
488
Embed Views
44

Actions

Likes
1
Downloads
0
Comments
0

1 Embed 44

http://www.design-reuse.com 44

Accessibility

Categories

Upload Details

Uploaded via as Microsoft PowerPoint

Usage Rights

© All Rights Reserved

Report content

Flagged as inappropriate Flag as inappropriate
Flag as inappropriate

Select your reason for flagging this presentation as inappropriate.

Cancel
  • Full Name Full Name Comment goes here.
    Are you sure you want to
    Your message goes here
    Processing…
Post Comment
Edit your comment

Coherency Challenges in Next Generation SoCs Coherency Challenges in Next Generation SoCs Presentation Transcript

  • PanelCoherency Challenges in Next Generation SoCsDesign & Reuse: IPSoC 2011 December 2011 Grenoble
  • Coherency Challenges in NextGeneration SoCsWith clusters of computation elements (e.g. CPUs, Video,Graphics) and increasing use of subsystems, how are thechallenges of coherency in providing the right data at theright time dealt with at the system level. ■ Riccardo Locatelli: Spidergon STNoC Manager, STMicroelectronics ■ Bruce Mathewson: AMBA Architect and an ARM Fellow. ■ Drew Wingard, CTO & co-founder of Sonics8 December 2011 IP SoC 2011, Grenoble 2
  • Cache Coherency: Wikipedia■ When clients in a system maintain caches of a common memory resource, problems may arise with inconsistent data.■ This is particularly true of CPUs in a multiprocessing system.■ Referring to the block diagram below , if the top client has a copy of a memory block from a previous read and the bottom client changes that memory block, the top client could be left with an invalid cache of memory without any notification of the change. Cache coherence is intended to manage such conflicts and maintain consistency between cache and memory.8 December 2011 IP SoC 2011, Grenoble 3
  • Fully Coherent SoC’s coming Source: http://www.pclaunches.com/processors/arm_super_phones_will_replace_laptops_in_2013.php Aug 201111/30/11 Copyright – Sonics, Inc., 2011 4
  • Questions to start the dialogue■ Why is coherency important?■ How does coherency help the software guys?■ What are the biggest challenges for coherency?■ Why is now the right time for coherency?■ How will coherency evolve/develop over time?8 December 2011 IP SoC 2011, Grenoble 5