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45nm transistor properties

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  • 1. 45nm TRANSISTOR PROPERTIES NAME : Shankardas Deepti Bharat ROLL NO. : CGB0911002 COURSE : MSc. [Engg] in VLSI System Design MODULE NAME : Integrated Circuit Analysis and Design MODULE CODE : VSD527 MODULE LEADER : Prof. Cyril Prasanna Raj P. 112/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 2. Outline Introduction Processors developed in 45nm Properties Advantages Disadvantages Future Scope Conclusion References12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 2
  • 3. Introduction The relentless drive in the semiconductor industry for smaller, faster, cheaper integrated circuits has brought the industry to the 45nm technology node. Penryn (codename), Intel’s next generation family of processors implemented in a 45nm High-k metal gate silicon process technology and designed to meet a wide range of power envelopes and market segments. In transistor design with the use of high-k and metal gate for the insulating walls and switching gates of its 45nm transistors. The 193nm immersion lithography has the wavelength of 193nm, but the medium for the light conduction is changed from air to water. Then Intel include new micro architecture . 312/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 4. Processors developed in 45nm Intel Core i7 series processors, i5 750 (Lynnfield and Clarksfield). Pentium Dual-Core Wolfdale-3M are current Intel mainstream dual core sold under the Pentium brand. AMD Deneb (Phenom II) and Shanghai (Opteron) Quad-Core Processors, Regor (Athlon II) dual core processors , Caspian (Turion II) mobile dual core processors. AMD(Phenom II) "Thuban" Six-Core Processor (1055T) Xenon on Xbox 360 S model. Figure 1 45 nm Processors 4 12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 5. Properties of 45nm Source and drain regions increase hole mobility by compressing the channel, electron mobility enhancement requires tensile strain, usually applied by means of a SiN cap layer, or stress liner. With different SiN deposition conditions, stress liners can also provide additional compressive strain for hole mobility enhancement.45 nm HK + MG (a) 65 nm transistor (b) Transistor (c) 45 nm HK + MG Figure 2 65nm & 45nm transistor In 45nm technology Hafnium-based high-k + metal gate transistors are the biggest advancement in transistor technology. 512/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 6. Properties Dielectric Lithography Delay Stress Enchantment Mobility Enhancement Leakage current Reliability Power consumption Speed Enhanced functionality 612/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 7.  Dielectric property Replace silicon dioxide as a gate dielectric. Desirable properties Resulting reduce in leakage current Lithography Figure 3 Gate leakage vs. VDS plot Immersion effectively decreases wavelength by puttingwater between the projection lens and the silicon waferie For air, n is approximately equal to 1.0 and For water, nis approximately equal to 1.4 because water is denser thanairShorter effective wavelengths enable smaller features tobe patterned Figure 4 Ion Lithography 712/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 8.  Delay 23% gate delay reduction compared to 65nm at the same Ioff and 10% lower VDD. Stress Enchantment Figure 5 Delay vs. current plot A dual-metal process with PMOS first, the stress of the NMOS gate is decoupled from the PMOS gate through optimization of the PMOS gate stack to buffer the stress The resultant transistors provide record drive current at low leakage and at tight contacted gate pitch achieving both performance and density Figure 6 Leakages in transistors benefits..12/14/2011 8 M.S.Ramaiah school of advanced studies, Bangalore
  • 9.  Mobility Enhancement Mobility enhancement technologies (strain new channel orientations) are stepping forward to fill this requirement and are being aggressively implemented in fabrication processes. 10x lower gate insulator leakage 30% lower switching power 20% higher drive current 5x lower leakage Figure 7 S-D leakage vs. Drive current 912/14/2011 M.S.Ramaiah school of advanced studies, Bangalore
  • 10. Advantages More computational ability Greater power efficiency Less power leakage Highest drive currents 20 percent increase in drive current or higher transistor performance, a twofold increase in transistor density, 30 percent reduction in transistor switching power and 10x reduction in gate oxide leakage power. Greater flexibility of design It reduces source-drain leakage by more than five times, thus improving the energy efficiency of the transistor12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 10
  • 11. Disadvantages Scaling down the supply voltage Vdd of CMOS digital circuits is a straightforward technique to reduce the energy per operation Eop as its switching component Esw is quadratically reduced. Low subthreshold swing S, low DIBL effect. Low variability of subthreshold reference current (mainly from Vt variability). Gate and junction leakages, Igate and Ijunc, below the level of subthreshold leakage.12/14/2011 11 M.S.Ramaiah school of advanced studies, Bangalore
  • 12. Future Scope Integrated with silicon infrastructure. Integration with conventional design. Comparable density and cost. To improve high-k devices for better switching characteristics 12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 12
  • 13. Conclusion The accuracy of PTM predictions is comprehensively verified: The error of I on is below 10% for both n-channel MOS and p-channel MOS 45nm HK+MG transistors demonstrating that these devices deliver reliability comparable to conventional SiO2 Devices at ~30% higher operating fields with negligible stress-induced leakage current ( SILC) degradation. 12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 13
  • 14. References[1] Chao, L. (2008) ‘Intel’s 45nm CMOS Technology’ Intel Technology Journal [online] 12(3). available from <http://www.intel.com/technology/itj/2008/v12i2/index.htm> [23 Oct 2011][2] Intel 45nm high-k metal gate press release (2007) Intel Demonstrates High-k + Metal Gate Transistor Breakthrough on 45nm Microprocessor [online] available from <http://www.intel.com/pressroom/kits/45nm> [21 Oct 2011]12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 14
  • 15. THANK U12/14/2011 M.S.Ramaiah school of advanced studies, Bangalore 15