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Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
Ei502 microprocessors & micrtocontrollers part 2(instructionset)
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Ei502 microprocessors & micrtocontrollers part 2(instructionset)

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Instruction set and some assembly programming

Instruction set and some assembly programming

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  • 1. EI 502Microprocessors & MicrocontrollersPart 2(Instruction Set)<br />Debasis Das<br />1<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 2. Addressing Modes<br />Immediate addressing<br />Register addressing<br />Direct Addressing<br />Indirect addressing<br />Implicit addressing<br />2<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 3. General Instruction Format<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />3<br />Source<br />Destination<br />Op<br />code<br />Operand 1<br />Operand 2<br />Note: 1. Instruction may include 0, 1 or 2 operands<br />
  • 4. Immediate Addressing<br />Value following the instruction op code is the operand<br />MVI D, FF hexadecimal FF value will be loaded into register D<br />LXI H, 1234 hexadecimal 1234, a 16 bit value will be loaded into H-L register pair<br />ADI 44 hex 44 will be added to the value in the accumulator<br />CPI 55 hex 55 will be compared to the value in accumulator<br />4<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 5. Register Addressing<br />Operand values stored in specified registers are used<br />MOV A, B operand contained in register B is moved to register A, the accumulator<br />ADD C operand value stored in register C is added to accumulator<br />SUB B operand stored in B is subtracted from the value in A<br />PCHL Exchange values contained in HL and PC<br />5<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 6. Direct Addressing<br />Value of the operand is a direct memory or I/O address<br />LDA ABC5 the operand is a memory address from which the value is to be loaded into the accumulator<br />STA 123F value in accumulator to be stored into memory location 123F<br />IN 23 input data from I/O port 23 hex<br />6<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 7. Indirect Addressing(Register Indirect)<br />Value of the operand is a pointer to memory location containing data<br />MOV M,B moves content of register B to memory location pointed to by the register pair H-L<br />ADD M add content of memory pointed to by H-L<br />MOV A,M move memory content pointed by H-L to accumulator<br />LDAX B load accumulator with value contained in memory location pointed by B-C<br />7<br />Mallabhum Institute of Technology Debasis Das<br />Aug 2011<br />
  • 8. Implicit Addressing<br />The operand is known and thus not needed in the instruction<br />STC set carry flag<br />RAL rotate accumulator left<br />DAA decimal; adjust accumulator<br />CMA complement accumulator<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />8<br />
  • 9. 8085/8085A Instruction Set<br />Data Transfer Instructions<br />Arithmetic instructions<br />Logical instructions<br />Branch instructions<br />Stack operations, I/O and Machine control operations <br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />9<br />
  • 10. Data Transfer Instructions<br />MOV r1, r2<br />MOV r, M<br />MOV M, r<br />MVI, r, data<br />MVI M, data<br />LXI rp, data<br />LDA addr<br />STA addr<br />LHLD addr<br />SHLD addr<br />LDAX rp<br />STAX rp<br />XCHG<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />10<br />
  • 11. Arithmetic Instructions<br />ADD r<br />ADD M<br />ADI data<br />ADC r<br />ADC M<br />ACI data<br />SUB r<br />SUB M<br />SUI data<br />SBB r<br />SBB M<br />SRI data<br />INR r<br />INR M<br />DCR r<br />DCR MINX rp<br />DCX rp<br />DAD rp<br />DAA<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />11<br />
  • 12. Logical Instructions<br />ANA r<br />ANA M<br />ANI data<br />XRA r<br />XRA M<br />XRI data<br />ORA r<br />ORA M<br />ORI data<br />CMP r<br />CMP M<br />CPI data<br />RLC<br />RRC<br />RAL<br />RAR<br />CMA<br />CMC<br />STC<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />12<br />
  • 13. Branch Instructions<br />JMP addr<br />Jcondition addr<br />CALL addr<br />Ccondition addr<br />RET<br />Rcondition <br />PCHL<br />Conditions<br />Carry<br />No carry<br />Positive<br />Minus<br />Zero<br />Non zero<br />Parity even<br />Parity odd<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />13<br />
  • 14. Stack, I/O, Machine ControlInstructions<br />PUSH rp<br />POP rp<br />PUSH PSW<br />POP PSW<br />XTHL<br />SPHL<br />IN port no.<br />OUT port no.<br />EI<br />DI<br />NOP<br />HLT<br />RIM<br />SIM<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />14<br />
  • 15. 1,2,3 Byte Instruction Structures<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />15<br />Op code<br />One byte instructions<br />Op code<br />Two byte instructions<br />Data/address<br />Op code<br />Least Significant Byte<br />Three byte instructions<br />Most Significant Byte<br />
  • 16. Typical Program Structure<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />16<br />1000<br />1008<br />1003<br />100B<br />100C<br />100D<br />1006<br />
  • 17. Add N 8bit Numbers<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />17<br />
  • 18. Sort in Descending Order<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />18<br />
  • 19. Find Largest Number<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />19<br />
  • 20. Multiplying Two numbers<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />20<br />
  • 21. Division of Two Numbers<br />Aug 2011<br />Mallabhum Institute of Technology Debasis Das<br />21<br />

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