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toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
toward high temperature power converters
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toward high temperature power converters

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  • 1. Towards an airborne high temperature SiC inverter Ampère CNRS UMR 5005 - Dominique Bergogne, Hervé Morel, Dominique Planson, Dominique Tournier, Pascal Bevilacqua, Bruno Allard - Hispano-Suiza SAFRAN group Régis Meuret, Sébastien Vieillard Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 1 / 28
  • 2. Overview 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 2 / 28
  • 3. More Electrical Aircraft 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 3 / 28
  • 4. More Electrical Aircraft Final target + 2 years Controler + gate driver + inverter up to 200°C Now : step One control + driver : 25°C inverter : 200°C Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 4 / 28
  • 5. More Electrical Aircraft A severe environment Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 5 / 28
  • 6. More Electrical Aircraft Specifications Stand-by 50 000 hours* Operation < 1000 hours Thermal cycles 15000 Thermal cycle -55°C to 200°C Power range 1-50 kW* DC input +/- 270V AC output 230V Cooling temperature up to 200°C At now 540VDC 6ARMS per phase cooling temperature : 200°C Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 6 / 28
  • 7. More Electrical Aircraft Why SiC JFETs ? Thermal runaway physical limits. SiC limits do not fit within this plot Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 7 / 28
  • 8. Characterizations 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 8 / 28
  • 9. Characterizations SiCED JFET The JFET can be usedwith external free-wheel diode Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 9 / 28
  • 10. Characterizations Effect of temperature : JFET static Measured at 225°C on one sample JFET* Saturation current is reduced at high temperature from 40A at 25°C to 25A at 225°C for this sample device RDSON varies from 0.2Ω to 0.6Ω Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 10 / 28
  • 11. Characterizations Effect of temperature : JFET dynamic Power side Turn-Off losses are almost constant versus temperature Turn-On losses are reduced from 900uJ to 500uJ Control side Gate charge is not affected by temperature Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 11 / 28
  • 12. Characterizations Effect of temperature : inductance Inductance is not affected, but losses ... Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 12 / 28
  • 13. Characterizations Effect of temperature : capacitor Capacitance is reduced , series resistance increases (ceramic) by a factor of 3 Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 13 / 28
  • 14. Characterizations Effect of temperature Conclusion High Temperature requires specific components/materials Some characteristics remain constant while ... Losses, in general, are increased at high temperature (times 10) Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 14 / 28
  • 15. JFET gate driver 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 15 / 28
  • 16. JFET gate driver What do we want ? Fast gate transients for reduced dynamic losses on the power side Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 16 / 28
  • 17. JFET gate driver Driver requirements Set by JFET (4mm², 1200V) Maximum gate voltage : -30V Peak current : 0.5 to 1A Set by environment Insulation up to 1000V, high dv/dt Logic signal input Several protections High temperature Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 17 / 28
  • 18. JFET gate driver Gate driver Gate circuit principle SOI circuit bloc diagram Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 18 / 28
  • 19. JFET gate driver Normal temperature driver The driver’s fonctions are implemented in a ’cold’ prototype Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 19 / 28
  • 20. JFET gate driver High temperature driver bloc diagram This driver is compatible with high temperature. Currently ’under construction’ Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 20 / 28
  • 21. Experimental verification 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 21 / 28
  • 22. Experimental verification JFET modelling Simulation output Experimental measurement This is the primary result on a novel JFET model Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 22 / 28
  • 23. Experimental verification 3 phase inverter under test Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 23 / 28
  • 24. Experimental verification Electrical measurements Gate behaviour Effect of gate wiring Power capability : 540VDC bus, 15A peak current at 250°C Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 24 / 28
  • 25. Experimental verification Verification Verified Driver and inverter functions Electrical behaviour of inverter at high temperature To be Verified Power losses (calorimetric/thermal measurement) Electrical behaviour of the system over full temperature range Thermal cycling mechanical stress effects Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 25 / 28
  • 26. Conclusion 1 More Electrical Aircraft 2 Characterizations 3 JFET gate driver 4 Experimental verification 5 Conclusion Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 26 / 28
  • 27. Conclusion Conclusion What is functionnal ? Inverter power core functionnal ’Cold’ Driver To be continued High temperature driver Thermal range testing of the system Mechanical aspects, integration Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 27 / 28
  • 28. Conclusion Thank you for your attention. Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 28 / 28

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