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ADSP and TMS family comparision
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ADSP and TMS family comparision


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diffrent dominated companies …

diffrent dominated companies
TMS nomenclature
evolution of TMS family
a) computational core feature
b) input/output capabilities
c) memory
d) programmability
Application of TMS320CXX

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  • 1.  Analog Devices ( ADSP-21xx 16 bit, fixed point ADSP-21xxx 32 bit, floating and fixed Lucent Technologies ( DSP16xxx 16 bit fixed point DSP32xx 32 bit floating point Motorola ( ( DSP561xx 16 bit fixed point DSP560xx 24 bit, fixed point DSP96002 32 bit, floating point Texas Instruments ( ( TMS320Cxx 16 bit fixed point TMS320Cxx 32 bit floating point
  • 2. LOGO’sTMS 32Cxx ADSP 21xx
  • 3. •Fabricated in a high speed, submicron, double-layer metal CMOSprocess, the highest-performance ADSP-21xx processors operate at25 MHz with a 40 ns instruction cycle time.•Every instruction can execute in a single cycle. Fabrication inCMOS results in low power dissipation.•The ADSP-2100 Family’s flexible architecture and comprehensiveinstruction set support a high degree of parallelism.•In one cycle the ADSP-21xx can perform all of the followingoperations:v.• Generate the next program addressvi.• Fetch the next instruction.vii.• Perform one or two data moves.viii.• Update one or two data address pointers.ix.• Perform a computation.x.• Receive and transmit data via one or two serial ports.xi.• Receive and/or transmit data via the host interface port.
  • 4. •The TMS320 family consists of two types of single-chip DSPs: 16-bit fixed point and 32-bit floating-point.•These DSPs possess the operational flexibility of high-speedcontrollers and the numerical capability of array processors.Combining these two qualities, the TMS320 processors areinexpensive alternatives to custom-fabricated VLSI and multichipbit-slice processors.• The following characteristics make this family the ideal choice fora wide range of processing applications:a Very flexible instruction setV Inherent operational flexibilityI High-speed performanceH Innovative, parallel architectural designI Cost-effectiveness
  • 5. ComparisonDSP processor features ADSP21xx TMS32cxxComputational core Core Clock frequency of Frequency of 100Mhz,feature. 100Mhz latest is now 150Mhz All instruction are cycle All floating point executed. instruction are multi cycle executed 96 universal registers 32 general purpose register Support 32 circular Support 8 circular buffers buffers. Support hardware loop No hardware loop
  • 6. ComparisonDSP Processor features ADSP 21xx TMS32CxxInput/output 4 serial ports, 2 link port , 1 host port, external portcapabilities external port (32bit) can (32 bit) ,2 multi channel be used with 14 DMA buffered serial port used Channels. with 16DMA Channels. All DMAs are non- All DMAs are intrusive. intrusive. Accomplished by ” cycle stealing” 400 Mbytes/ sec 200Mbytes/sec maximum maximum throughput throughput through through external memory external memory interface. interface. 400Mbytes/sec (latest) Support GLUELESS Requires GLUELOGIC for shared memory shared memory with multiprocessing other processors.
  • 7. ComparisonDSP Processor features ADSP 21xx TMS32CxxMemory 1mega bit on chip RAM ½ mega bit on chip (128k bytes on RAM ) RAM(72k bytes of on chip memory ) Can store up to 21k Can store up to 18k instructions . instructions. Dual ported on chip Only 4k program memory memory with unified and 4k data cache support address space. parallel access.
  • 8. ComparisonDSP Processor ADSP 21xx TMS32CxxfeaturesProgrammability Support SIMD VLIW architecture programming model requires instructions which is suited for many explicitly to program type of applications ie. various compute units in Reduced code size. the processor ie. Larger code size. Easy to write code in its not easy to write code assembly as all in assembly because instruction complete in instructions take multiple 1cycle. cycle to complete. It is difficult.
  • 10.•An introduction to Microcomputers(Volume 2 part B) page( 18/95- 18/98)by ADAM OSBORNE JERRY KANE.•Digital Signal ProcessingBy Ifeacher & jervis (page 873 to 900)