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IC Design of Power Management Circuits (I)

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  • 1. IC Design of Power Management Circuits (I) Wing-Hung Ki Integrated Power Electronics Laboratory ECE Dept., HKUST Clear Water Bay, Hong Kong www.ee.ust.hk/~eeki International Symposium on Integrated Circuits Singapore, Dec. 14, 2009
  • 2. Tutorial Content 1. Switching Converters: Fundamentals and Control 2. Switching Converters: IC Design 3. Switching Converters: Stability and Compensation 4. Fundamentals of Bandgap References 5. Development of Integrated Charge Pumps 6. Introduction to Low Dropout Regulators Ki 2
  • 3. Part I Switching Converters: Fundamentals and Control Ki 3
  • 4. Content Steady State Analysis Lossless elements Buck, boost, buck-boost power stages Volt-second balance Continuous conduction mode Discontinuous conduction mode Ringing suppression Pseudo-continuous conduction mode Efficiency Performance Evaluation Parameters Control Topologies PWM voltage mode control PWM current mode control Ki Single-Inductor Multi-Input Multi-Output Converters 4
  • 5. Linear Regulator has Low Efficiency Idd MN IQ1 IQ2 VREF Vdd EA Vo IQ3 Io R1 bVo R2 C RL power converter Efficiency of linear regulator is not high: η= Ki Po VI V Io V = o o = o < o <1 Pin VddIdd Vdd Io + IQ Vdd Can one design a power converter with efficiency close to 1? 5
  • 6. Switches as Lossless Components A power converter with high efficiency needs lossless components. Reactive elements: capacitors, inductors Active elements: switches L C − store & relax store & relax PC = 0 Ki + Vsw Isw PL = 0 + Vsw Isw − switch open switch closed Psw = Vsw×Isw = Vsw×0 =0 Psw = Vsw×Isw = 0×Isw =0 6
  • 7. Switching Converter: Heuristic Development (1) Vo = Vdd Vo Vdd RL t No regulation SW1 Vdd Vo Vdd Vo = DVdd RL t duty ratio = D Ki Load cannot accept a pulsating supply voltage 7
  • 8. Switching Converter: Heuristic Development (2) Vo L SW1 Vdd C Vx Vdd Ki Vo L SW1 SW2 RL C Add a lossless filter to achieve small ripple voltage, but … when switch is off, inductor current cannot change instantaneously and cause spark (volt-second balance). Vdd Vo = DVdd RL Add a second switch that operates complementarily to arrive at a functional switching converter. t 8
  • 9. Buck, Boost and Buck-Boost Converters (1) Vx SW1 Vdd SW2 Vo L C RL Buck Vx L Vdd Vo SW2 SW1 C SW1 Vdd Ki Vo SW2 L C has to be in parallel with RL for filtering, leaving three ways to place L, SW1 and SW2 between Vdd and RL. RL Boost Vx One L and one C gives a second order switching converter. Three types of converters: Step-down: buck Step-up: boost Step-up/down: buck-boost (Boost-buck, or Cuk, is a 4th order converter) Buck-boost C RL 9
  • 10. Buck, Boost and Buck-Boost Converters (2) state 1 Vx MN Vdd L i D1 C state 2 RL L Vx i MN state 1 Vo D1 C RL Boost MN Vdd Ki state 1 SW1 is the controlling switch that determines the duty ratio D, while SW2 provides a path for the inductor current i to flow when SW1 is off. Buck state 2 Vdd Vo Vx D1 Vo i L state 2 C RL Buck-Boost SW1 can be a power NMOS (MN). If power PMOS is used, the phase has to be reversed. To prevent i from going negative, SW2 is usually implemented by a diode (D1), but the forward drop gives a low efficiency. Note that Vo of buck-boost is negative. 10
  • 11. I-V Relations of C and L The I-V characteristics of a capacitor and an inductor are described by ic = C dv c dt ic C + vc i v =L di dt + L v − − Approximations are very useful in many calculations: ic = C ΔVc Δt v =L Δi Δt For sinusoidal steady state, the phasor relations are: zc = Ki vc 1 = ic jωC z = v = jω L i 11
  • 12. Volt-Second Balance Switching actions cause ripples for both inductor current (i ) and capacitor voltage (vc). In the steady state, both quantities return to the same value after one cycle. i + v V (S1 ) = m1 L − di dt ⇒ ΔI = i ΔI I L v =L V (S2 ) = −m2 L V Δt L 0A t1 t2 (or DT) (or D ' T) Inductor current has to obey volt-second balance (VS balance): V (S1)×t1 + V (S2)×t2 = 0 ⇒ m1t1 = m2t2 or m1D = m2D’ It is used to compute the conversion ratio M = Vo/Vdd. Ki 12
  • 13. Inductor, Input, Switch, Diode and Tail Currents i Consider the buck converter: idd is L Vx MN Vdd i D1 id it Vo ic Io C RL Input current idd: current through Vdd idd is Switch current is: i in State 1 Diode current id: i in State 2; even if diode is implemented by NMOS switch Tail current it: current through the combination of C and RL. id Capacitor current ic: ac part of tail current Load current io: averaged tail current Ki it Io 13
  • 14. Continuous Conduction Mode The converter is operating in continuous conduction mode (CCM) if the inductor current is always larger than zero. Boost converter (Step-up) Buck converter (Step-down) Vdd Vo +V − S1 S2 m1D = m2D’ ⇒ (Vdd-Vo)D = VoD’ ⇒ M= Ki V0 =D Vdd Vdd Buck-boost converter (Step-up/down) Vo +V − S1 S2 m1D = m2D’ ⇒ VddD = (Vo-Vdd)D’ ⇒ M= V0 1 = Vdd 1 − D Vdd Vo S1 + V − S2 m1D = m2D’ ⇒ VddD = -VoD’ ⇒ M= V0 −D = Vdd 1 − D 14
  • 15. Discontinuous Conduction Mode When the switching converter is operation in CCM, one switching cycle has two states S1 and S2. When the load current becomes smaller and smaller, eventually the inductor current would fall to zero, and the converter then operates in discontinuous conduction mode (DCM) with a third state S3. During D3T, all switches are open. V (S1 ) = m1 L V (S2 ) = −m2 L V (S3 ) =0 L i ΔI i =0 DT D2 T D3 T VS balance becomes: m1D = m2D2 Ki 15
  • 16. Ringing Suppression When both switches are open, L, C and the parasitic capacitor Cx at Vx form a resonance circuit that leads to serious ringing. Vx Vdd SW2 i Cx SW3 Vx Vo L SW1 We may add a small switch to short the inductor when SW1 and SW2 are both off [Jung 99]. Vdd C RL SW2 Vo L SW1 Cx C RL i Vdd Vo Ki Vx Vx 16
  • 17. Pseudo-Continuous Conduction Mode By increasing the size of the ringing suppression switch, a switching converter may work in pseudo-continuous mode (PCCM). It was first employed in a single-inductor dual-output (SI-DO) converter to increase the current handling capability [Ma 03b]. When both SW1 and SW2 are open, the freewheel switch SWFW is closed to allow free-wheeling of i at Ipccm. SWFW L Vx SW1 Vdd Vo i SW2 C i Ipccm RL 0 Ki 17
  • 18. Efficiency of Buck Converter Rs Idd Io L S1 Vdd Vo R S2 Rd C RL η= Po VI = o o Pdd VddIdd For an ideal buck converter working in CCM, the conversion ratio M is Vo/Vdd = D, and Io:Idd = 1:D, giving η=1. If conduction loss is accounted for, then Io/Idd is still 1/D, but M is modified as M=ηD, with P 1 η= o = R + DR s + D 'R d Pdd 1+ RL Ki 18
  • 19. Efficiency of 2nd Order Converters By accounting for conduction losses due to switch, diode and inductor series resistance (Rs, Rd and R , respectively), the efficiencies of buck, boost and buck-boost converters are computed as [Ki 98] 1 R + DR s + D 'R d 1+ RL Buck: Boost: ηboost = Buck-boost: Ki ηbuck = ηbuck −boost = 1 1 R + DR s + D 'R d 1+ 2 RL D' 1 1 R + DR s + D 'R d 1+ 2 RL D' 19
  • 20. Performance Evaluation Parameters For a good voltage regulator, the output voltage should remain constant even the input voltage, load current or temperature changes. Steady state parameters: Line regulation Load regulation Temperature coefficient Small signal parameters: Power supply rejection Output impedance Transient parameters: Line transient (settling times) Load transient (settling times) Reference tracking time Ki 20
  • 21. Line Regulation Line regulation is the change of Vo w.r.t. the change in Vdd: line reg. = = ΔVo ΔVdd in mV / V ΔVo / Vo ΔVdd in % / V Switching converters are non-linear circuits for large signal changes, and hand analysis is impossible. It could be obtained by simulation. In datasheets, line regulation is usually measured. Ki 21
  • 22. Power Supply Rejection For a good switching converter (also for bandgap reference and linear regulator), the output voltage should be a weak function w.r.t. the supply voltage. Hence, a small signal parameter, the power supply rejection, gives good indication of line regulation. Power supply rejection (PSR) is the small signal change of Vo w.r.t. the small signal change in Vdd. vo v dd In transfer function form: PSR = In dB: PSR = 20 × log v dd vo Usually |vo/vdd| < 1, but we customarily give a positive PSR in dB. Note: Ki Line reg. ≈ PSR × ΔVdd 22
  • 23. Load Regulation and Output Impedance Load regulation is the change of Vo w.r.t. the change in Io: load reg. = = ΔVo ΔIo in mV / mA ΔVo / Vo ΔIo in % / mA In datasheets, load regulation is usually measured. In the small signal limit, load regulation is the output impedance: Ro = Ki dVo dIo in Ω 23
  • 24. Temperature Coefficient Temperature coefficient (TC) is the change of a parameter X w.r.t. the change in T, and is a large signal parameter: TC = = ΔX X(T2 ) − X(T1 ) = ΔT T2 − T1 in [X] / o C ΔX / X ΔT in ppm / o C TC could be positive or negative. Ki 24
  • 25. PWM Voltage Mode Control (1) A regulated switching converter consists of the power stage and the feedback circuit. MP Vo L Vg MN RL ck C R1 CMP Q R Q va EA A(s) S va bVo Vref ramp Q R2 va Q ramp ck Ki For a buck converter, if an on-chip charge pump is not available, then the NMOS power switch is replaced by a PMOS power switch. 25
  • 26. PWM Voltage Mode Control (2) The output voltage Vo is scaled down by the resistor string R1 and R2. The scale factor is b = R2/(R1+R2). The scaled output voltage bVo is compared to the reference voltage Vref to generate a lowpass filtered voltage Va through the compensator A(s). At the start of the clock, the SR latch is set and the switch MP is turned on, starting the duty cycle. A sawtooth waveform (ramp) synchronized with the clock ramps up. When the ramp reaches the level of Va (trip point), the SR latch is reset, terminating the duty cycle. Ki When the SR latch is set, i ramps up. When the SR latch is reset, i ramps down. In the steady state, i returns to the same level at the start of every clock cycle. 26
  • 27. PWM Feedback Action For stability, the control loop has to have negative feedback. Assume Vo drops suddenly due to change in load or disturbance ⇒ error voltage Verr = (Vref–bVo) becomes larger ⇒ Va = A(f)(Vref–Vo) also becomes larger ⇒ with a higher Va, it takes the ramp longer to reach Va ⇒ duty ratio D is temporarily increased ⇒ more current is dumped into the load ⇒ Vo rises accordingly and eventually settles to the original value Note that A(s) is the frequency response of the compensator, not of the op amp Aop(s). Ki 27
  • 28. PWM Current Mode Control A current mode controlled switching converter is realized by replacing the fixed voltage ramp with the inductor current ramp. L MP Vo i Vdd RL MN C R1 CMP Q R Q va EA A(s) S Vdd ck Vref R2 current sensor i /N va NR f Ki bVo i Rf 28
  • 29. Sub-harmonic Oscillation and Slope Compensation Output of EA Va cannot change in one cycle. If inductor current is perturbed by an amount of ΔI1, oscillation occurs if ΔI2 −m2 = > 1 ⇔ D > 0.5 m1 ΔI1 Ia = Va / R f D < 0.5 Ia = Va / R f D > 0.5 −m2 m1 ΔI1 ΔI2 ΔI1 m1 −m2 ΔI2 To prevent oscillation, employ slope compensation by adding a negative slope to Ia (i.e., Va) to suppress the change in ΔI2. Ia = Va / R f −mc m1 Ki ΔI1 m − m2 m ΔI2 = c < 1 ⇔ mc > 2 mc + m1 2 ΔI1 −m2 ΔI2 29
  • 30. Current Mode PWM with Compensation Ramp In practice, the output of EA (Va) should not be tempered, and a compensation ramp of +mc is added to m1 instead. L MP Vo i Vdd RL MN C R1 CMP Q (m1 + mc )R f va Ki EA A(s) S −(m2 − mc )R f vb DT R Q va bVo Vref Vdd R2 i /N ck V2I vb NR f ramp from OSC compensation ramp 30
  • 31. Synchronous Rectification To eliminate loss due to forward diode drop, the power diode is replaced by a power NMOS MN, and the scheme is known as synchronous rectification. To eliminate short-circuit loss of MP and MN, a break-before-make (BBM) buffer is used. L MP Q, VP i Vdd RL MN C VP VN BBM Buffer Ki Q R Q S Additional logic is needed for DCM operation. Q (ck) VN φ1 φ2 φ1 = VP φ2 Non-overlapping φ1 and φ2 φ1 φ2 = VN 31
  • 32. Multiple-Output Converters Consider two boost converters that operate in deep DCM: L i1 Vdd Vo1 S1 S0 C1 i1 R L1 T 2T T 2T L i2 Vdd Ki Vo2 S2 S0 i2 R L2 C2 32
  • 33. Single-Inductor Multiple-Output Converters Time-multiplexing allows sharing one inductor and diverting the inductor current to two or more outputs [Ma 03a]: Vo1 S1 L C1 i R L1 i Vdd T S0 Vo2 S2 C2 Ki 2T R L2 33
  • 34. SIMO Converter in PCCM To handle large load currents, raise the inductor current floor to operate in PCCM. Add a free-wheeling switch (SFW) to short the inductor when the inductor current reaches Ipccm [Ma 03b]. SFW Vo1 S1 L C1 i R L1 i T S0 Vo2 S2 C2 Ki 2T T Vdd 2T i R L2 Ipccm 34
  • 35. SI-MIMO Converter Some applications need two converters in series with reduce efficiency. Vbat Vload Vsrc Energy-harvesting source Boost 1 Rechargeable battery Boost 2 Load Reorganize by using a SI-DIDO converter that needs only one inductor [Lam 04b], [Lam 07b], [Sze 08]. Vbat Vbat Vload Vsrc Ki Energy-harvesting source SI-DIDO boost Load Rechargeable battery 35
  • 36. Development of SI-MO and SI-MIMO Converters The recent years sees active R&D activities of SI-MO and SI-MIMO switching converters for low power applications. It is important to recognize the contribution of the first developers. The idea of SI-MO converters was first conceived in [Goder 97], and only boost sub-converters were considered. An SI-DO converter with buck-boost sub-converters was discussed in [Ma 97] to demonstrate the switching flow graph modeling method. SI-DO converters became commercial products [MAX 98, UCC 99]. The concept of SI-MO was reinvented [Li 00, Ma 00, Ma 01, May 01]. [Ma 01] stressed the importance of DCM operation for reducing cross-regulation. A systematic classification is discussed in [Ki 01]. DCM operation is extended to PCCM operation in [Ma 02]. The concept of SI-MIMO was conceived [Lam 04, Lam 07]. Ki 36
  • 37. References: Switching Converter Fundamentals Books: [Brown 01] M. Brown, Power Supply Cookbook, EDN, 2001. [Erickson 01] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd Edition, Springer Science, 2001. [Kassakian 91] J. G. Kassakian, M. F. Schlecht and G. C. Verghese, Principle of Power Electronics, Addison Wesley, 1991. [Krein 98] P. E. Krein, Elements of Power Electronics, Oxford, 1998. Papers: [Jung 99] S. H. Jung et. al., "An integrated CMOS DC-DC converter for battery-operated systems," IEEE Power Elec. Specialists Conf., pp. 43–47, 1999. [Ki 98] Ki W. H. Ki, "Signal flow graph in loop gain analysis of DC-DC PWM CCM switching converters," IEEE TCAS-1, pp.644-655, June 1998. 37
  • 38. References: Early Development of SI-MIMO Converters (1) [Goder 97] D. Goder and H. Santo, “Multiple output regulator with time sequencing,” US Patent 5,617,015, April 1, 1997. [Ma 97] [MAX 98] "MAX685: Dual-output (positive and negative) DC-DC converter for CCD and LCD", Maxim Datasheet, 1998. [UCC 99] "UCC3941: 1V synchronous boost converter," Datasheet, Unitrode Semiconductor Products, Jan. 1999. [Li 00] T. Li, "Single inductor multiple output boost regulator," US Patent 6,075,295, June 13, 2000. [Ma 00] Ki Y. H. Ma and K. M. Smedley, "Switching flow-graph nonlinear modeling method for multistate-switching converters," IEEE Trans. on Power Elec., pp.854–861, Sept., 1997. D. Ma and W. H. Ki, "Single-inductor dual-output integrated boost converter for portable applications," 4th Hong Kong IEEE Workshop on SMPS, pp. 4251, Nov. 2000. 38
  • 39. References: Early Development of SI-MIMO Converters (2) [Ma 01a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A single-inductor dual-output integrated DC/DC boost converter for variable voltage scheduling", IEEE/ACM Asia South Pacific Design Automation Conf., LSI University Design Contest, pp.19–20, Jan. 2001. [May 01] [Ma 01b] D. Ma, W. H. Ki, P. Mok and C. Y. Tsui, "Single-inductor multiple-output switching converters with bipolar outputs", IEEE Int'l. Symp. on Circ. and Syst., pp. III-301 - III-304, Sydney, May 2001. [Ma 01c] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A 1.8V single-inductor dual-output switching converter for power reduction techniques," IEEE Symp. on VLSI Circ., Kyoto, Japan, pp. 137-140, June 2001. [Ki 01] W. H. Ki and D. Ma, "Single-inductor multiple-output switching converters", IEEE Power Elec. Specialists Conf., Vancouver, Canada, pp.226–231, June 2001. [Ma 02] Ki M. W. May, M. R. May and J. E. Willis, "A synchronous dual-output switching dc-dc converter using multibit noise-shaped switch control," IEEE Int’l SolidState Circ. Conf., pp.358–359, Jan 2001. D. Ma, W.H. Ki, and C.Y. Tsui, "A pseudo-CCM / DCM SIMO switching converter with freewheel switching", IEEE Int'l Solid–State Circ. Conf., San Francisco, pp.390–391+476. Feb. 2002. 39
  • 40. References: Early Development of SI-MIMO Converters (3) [Ma 03a] [Ma 03b] D. Ma, W. H. Ki and C. Y. Tsui, "A pseudo-CCM/DCM SIMO switching converter with freewheel switching," IEEE J. of Solid-State Circ., pp. 10071014, June 2003. [Lam 03] Y. H. Lam, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor dual-input dualoutput switching converter for integrated battery charging and power regulation," IEEE Int'l. Symp. on Circ. and Syst., Bangkok, Thailand, pp. III.447-III.450, May 2003. [Lam 04] H. Lam, W. H. Ki, C. Y. Tsui and D. Ma, "Integrated 0.9V charge-control switching converter with self-biased current sensor," IEEE Int'l Midwest Symp. on Circ. & Sys., pp.II.305–II.308, July 2004. [Koon 05] S. C. Koon, Y. H. Lam and W. H. Ki, "Integrated charge-control singleinductor dual-output step-up/step-down converter," IEEE Int'l. Symp. on Circ. and Syst., Kobe, Japan, pp. 3071-3074, May 2005. [Lam 07] Y. H. Lam, W. H. Ki and C. Y. Tsui, "Single-inductor multiple-input multipleoutput switching converter and method of use," US Patent 7,256,568, Aug 14, 2007. [Ma 09] Ki D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode," IEEE J. of Solid-State Circ., pp. 89-100, Jan. 2003. D. Ma, W. H. Ki, and C. Y. Tsui, "Single-inductor multiple-output switching converters in PCCM with freewheel switching," US Patent 7,432,614, Oct. 7, 2008. 40

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