Integrated Power Management Silicon Platforms for Fabless Design in the 5V- 700V Range<br />Dr Shye Shapira<br />Director ...
Integrated Power Management Applications are Thriving<br />Portable devices are proliferating: Including multiple subsyste...
 From IDM Monopoly to Foundry –Fabless Relation<br />Last three years and ongoing: Process Design kits available from Foun...
Impact on the Israeli Fabless Arena<br />Growing Market +<br /> Foundry Availability of Power Management Platforms +<br />...
The Odds For/Against Fabless Power Design<br />Europe/US 2011<br />(Tradition in PMIC* design)<br />Israel  2011<br />(No ...
Evening Out the Odds<br />U.S. Wild West 1860 s:<br />”God created man, <br />but Samuel Colt made them Equal.“ <br />6<br...
Challenges in Power Management  Platform Design <br />
Integrated Power Management Application Space<br />5v-60V<br />DC DC Converter (“Boost Buck” Convertors Std Alone, Digital...
TowerJazz Confidential<br />5-60V : PMIC and the Self Aligned <br />Body Ldmos<br />Drain<br />Channel<br />Channel<br />S...
Pcell Features & GUI of a scalable voltage LDMOS<br />Scalable Voltage :<br />Best Device Area tradeoff  for required volt...
Isolation Challenge In Integrated Power Management Circuits<br />1. Current (Several Amps) Drawn From <br />Substrate by i...
5V-60V Isolated Platforms<br />TowerJazz Confidential<br />Shallow NBL: Buried layer <br />shorted to drain<br />Deep NBL:...
700V platform<br />Logic<br />Density<br />Analog<br />Rdson: Resurf<br />13<br />
700V NLDMOS<br />Layout Examples:<br />700v Ldmos Device and Building  Blocks<br />Double Resurf: Isolation layer<br /> Pi...
Zener Diode in 700V Process<br />BV = 6V<br />Can Float to 50V<br />No Walk out<br />
Additional Material<br />Chipex 2010:Integrated Power Management Platforms: Applications Production and Figures of Merit.<...
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Chip ex2011 towerjazz power

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Chip ex2011 towerjazz power

  1. 1. Integrated Power Management Silicon Platforms for Fabless Design in the 5V- 700V Range<br />Dr Shye Shapira<br />Director of RD Integrated Power <br />Management Platforms<br />TowerJazz<br />May 4, 2011<br />
  2. 2. Integrated Power Management Applications are Thriving<br />Portable devices are proliferating: Including multiple subsystems with different voltage ratings that require multiple power management circuits.<br />Green (Efficient) Offline Applications: Small size conversion circuitry from Grid to a low voltage application power. Highest volume application: home LED lights.<br />
  3. 3. From IDM Monopoly to Foundry –Fabless Relation<br />Last three years and ongoing: Process Design kits available from Foundries 60V, 200V, 700V<br />Until then : Integrated Power Management Design almost all Independent Device Manufacturer<br />3<br />
  4. 4. Impact on the Israeli Fabless Arena<br />Growing Market +<br /> Foundry Availability of Power Management Platforms +<br /> Large Fabless Community +<br />2 to 5 years =<br />Most Fabless companies in Israel ( as in most other places…) design integrated PM Chips<br />
  5. 5. The Odds For/Against Fabless Power Design<br />Europe/US 2011<br />(Tradition in PMIC* design)<br />Israel 2011<br />(No tradition in PMIC* design <br />but analog /digital design community)<br />Independent Power Device <br />Manufacturer<br />Universities<br />Analog /RF Design Houses<br />Digital Intensive IDM<br />Production Worthy PMIC Design Capability<br />Time<br />Engineering Work Force Migration<br />Engineering Work Force Migration<br />Power Supply Makers<br />Fabless Start Up<br />Fabless Start Up<br />Production Worthy PMIC Design Capability<br />Learning Cycles<br />Production Worthy PMIC Design Capability<br />*PMIC=Power Management Integrated Circuits<br />
  6. 6. Evening Out the Odds<br />U.S. Wild West 1860 s:<br />”God created man, <br />but Samuel Colt made them Equal.“ <br />6<br />Integrated Power Management Design 2011 :<br />” Advanced Foundry Power Management Design Platforms, Process Design Kits and Design Service make Design Capabilities Equal.“ <br />
  7. 7. Challenges in Power Management Platform Design <br />
  8. 8. Integrated Power Management Application Space<br />5v-60V<br />DC DC Converter (“Boost Buck” Convertors Std Alone, Digital Cameras)<br />LED Drivers<br />Motor Drives<br />Line Drivers<br />Class D Audio Amplifiers. Low Ron and low noise.<br />Power over Ethernet<br />RF Power Amplifiers<br />150v-700V<br />Offline applications AC adapter<br />Voltages 400 to 600V <br />Lighting<br />
  9. 9. TowerJazz Confidential<br />5-60V : PMIC and the Self Aligned <br />Body Ldmos<br />Drain<br />Channel<br />Channel<br />Self aligned Body option <br />Allows short channel ,<br />Low specific Rdson<br />Isolated Source<br />Two Process options to allow reduced Rdson<br />Scalable drain allows proper voltage BV relation<br />9<br />
  10. 10. Pcell Features & GUI of a scalable voltage LDMOS<br />Scalable Voltage :<br />Best Device Area tradeoff for required voltage<br />Guard Ring Selection in Pcells<br />Parasitic Metal Resistance Calculator<br />Transistor is mad of a 2D array of fingers. #Nf=Nr*Nc<br />Drift region or operating voltage choosing box/switch<br />Calculators: operating voltage, Breakdown voltage, Ron with or without the M2 routing<br />Thermal resistance flag<br />Routing options<br />Guard Ring options: no G.R, PM rings (up to 5) or P+AA ring<br />Advanced options, will be allowed at future PDK<br />10<br />10<br />
  11. 11. Isolation Challenge In Integrated Power Management Circuits<br />1. Current (Several Amps) Drawn From <br />Substrate by inductor through ldmos drain affects all other low current (microA-mA) circuitry via noise or latchup risk.<br />2. Minority Carriers injected by diode may still diffuse to substrate through isolating layer<br />Analog<br />Bgref (I~microA)<br />11<br />
  12. 12. 5V-60V Isolated Platforms<br />TowerJazz Confidential<br />Shallow NBL: Buried layer <br />shorted to drain<br />Deep NBL: Buried layer Isolated <br />Allows drain Isolation<br />Deep NBL<br />Shallow NBL<br />
  13. 13. 700V platform<br />Logic<br />Density<br />Analog<br />Rdson: Resurf<br />13<br />
  14. 14. 700V NLDMOS<br />Layout Examples:<br />700v Ldmos Device and Building Blocks<br />Double Resurf: Isolation layer<br /> Pinched off on both sides<br />
  15. 15. Zener Diode in 700V Process<br />BV = 6V<br />Can Float to 50V<br />No Walk out<br />
  16. 16. Additional Material<br />Chipex 2010:Integrated Power Management Platforms: Applications Production and Figures of Merit.<br />ASCR Technion: Integrated Power Management Circuit Platforms: Figures of Merit, Features and their correlation to applications.<br />GSA Forum:Integrated Power Management Platforms: The Entry of Fabless Design Houses to Power Management System Design<br />16<br />

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