Who is this guy?PresentSan DiegoCalifornia20001997OttawaCanada20092006San DiegoCaliforniaOptical Networks Division19971993OttawaCanada* nowMotorola/VideoDistributionDivision* nowMitel/Communications Infrastructure Division19931989SarajevoBosniaHerzegovina20062000San DiegoCaliforniawww.energoinvest.com19891984BSEEwww.etf.unsa.ba{ Experienced SoC ~ FPGA ~ ASIC ~ Embedded ~ High-Speed } Designer | Architect

SoC Designer | ArchitectSoC is the chip hosting microcomputer subsystemIt typically also sports significant 3rd party IP contentSoC is the art of partitioning & creating clean structure with natural, well defined (often standardized) interfaces and buses (AMBA/AXI/AHB/APB, CoreConnect, OpenCoreProtocol, Avalon,…)It’s like my boards (of the `90s), now on the chip A typical ASIC designer lacks the system, application and use-case perspective, which I describe as: ‘Design Functionality, not only RTL code’

My SoC design/architecture sample

FPGA DesignerFPGA is the front-end heaven of Logic DesignLogic (If-Then implications) is my strong attribute!Typical ASIC designer produces too ‘cloudy’ RTL which threatens timing closure: FPGA RTL is harder to write!FPGA expertise is also about befriending with underlying gate/clock/interconnect fabric, mega-macros, adapting to them & making choices within the given physicalsXilinx is my specialty: V2Pro, Spartan3, V4, Virtex5‘Programmable Imperative ~ Software Defined Silicon’ C-to-Verilog and HPC4mare my passion (and future of electronics)Check my blog: FPGA Day & Night(http://chili-chips.blogspot.com)

My FPGA design sample

ASIC DesignerWhile FPGA is Logic/RTL/Front-End centric, ASIC has significant Physical/Back-End/Fab workload Tool complexity swells. Tools grow more important. Automation, scripting, processing and filtering of massive netlists and timing reports is often the key I’ve used Synopsys tool flow, TCL, Perl, shell scriptingCompleted projects in COT and ASIC engagement model (and variants)Worked with standard-cell and full-custom flows; Transistor-level analog designers; Place-n-Route, Packaging guys; DFT gals

My ASIC design sampleHard-macro for DDR3 SDRAM PHY – Pure COT, mixed-signal project

Embedded & High-SpeedEmbedded is the computing system (CPU/MCU+mem) with few well defined functions which it excels inDesigning one needs good judgment for HW/SW partitioning & great deal of CS in addition to EE. I write firmware in ‘C’ and Assembly and have been through schematics/boards Completed significant work in multi-Gbps serial & high-speed DDR connectivity, wearing both designer and user hat; At board, chip and IP level

My Embedded Design SampleFirst project: 1989/90 ISDN BA Terminal Adapter as an add-on card for the PC ISA bus, based on Intel 80188 micro and Mitel ISDN chipset. I designed all the hardware and wrote device drivers and BIST in ASM86 as ‘C’ externs. Many more projects followed, more complex and higher-speed, but this one remained the dearest…

ExperienceExperience is the breadth of perspective.It’s knowingwhat$, why? and how!Experience is the insight that guides ~ ~ Doing it right in the first pass It’s knowing what it takes: : Setting realistic goals and expectations. Thanks to experience, one can quickly acquire new domain skills, tools, methodologies…

My Experience20 yearsin the electronics industry, mostly as the key contributor on advanced, ‘Technology Frontier’ and carrier-class product developments

A Snapshot of Professional Training

A Snapshot of Professional Training (cont’d)

References1) Jim Lew-Digital Design Manager at AMCChttp://www.linkedin.com/pub/9/552/80aJasmin directly reported to Jim.2) Shaw Yuan- Sr. Communication Systems Engineer at Entropichttp://www.linkedin.com/pub/2/106/2a9Jasmin worked with Shaw on DSP aspects of FPGA-based proof-of-concept prototype platform for MoCA cable modem technology.3) Omer Acikel- Digital Communication System Engineer at AMCChttp://www.linkedin.com/pub/5/a93/729Jasmin worked with Omer on using FPGAs to accelerate Simulink/MATLAB sims of a DFE/FFE-based CDR block for 10Gbps long-reach SerDes.4) LinkedIn Recommendations:View Full Profile: http://www.linkedin.com/in/jasminibrahimovic

Thank You!Q&Awww.chili-chips.com