1. Memory TechnologiesWijayarathna D.G.C.D. 100596F DDR-DRAM When we consider the RAM, there are two major types of RAMs, Static RAM (SRAM) and Dynamic RAM(DRAM). Static RAM is developed using transistors and DRAM is developed using capacitors. Since DRAM is developed using capacitors, they are slower in speed, but cheap than SRAM and consume low power. DRAM is using in main memory of a computer and SRAM in registers and cache. RAM is working according to a clock like a flip-flop. It transfers its commands, addresses, and data on the rising edge of the clock. But DDR-DRAM transfers data not only in the rising edge of the clock, but also in the falling edge of the clock cycle. S DDR can transfer two data words per clock cycle. DDR-SDRAM SDRAM(Synchronous Dynamic Random Access Memory) is dynamic random access memory (DRAM) that is synchronized with the system bus.Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs. SDRAM has a synchronous interface, meaning that it waits for a clock signal before responding to control inputs and is therefore synchronized with the computers system bus. The clock is used to drive an internal finite state machine that pipelines incoming
2. instructions. This allows the chip to have a more complexpattern of operation than an asynchronous DRAM, enablinghigher speeds.FCRAMFCRAM (Fast Cycle RAM) is a new technology thatapproaches the problem of DRAM/Processor speed in adifferent way. With the improvements in CPU speeds over thelast few years, designers have looked for a solution that wouldget them over the ever present problem of relative slowermemory.Specifically, this memory technology was developedto reduce random cycle latency (random access and cycletimes) while increasing peak bandwidth.FCRAM achieves thisby implementing several architectural enhancements including:1. Three-stage row pipelining2. Fast access core3. Simplified DDR feature set4. Fast bus turnaround timesFPM-DRAMFPM DRAM (Fast Page Mode DRAM) is a common kind ofDRAM in personal computers. Page mode DRAM essentiallyaccesses a row of RAM without having to continuallyrespecify the row. A row access strobe (RAS) signal is keptactive while the column access strobe (CAS) signal changes toread a sequence of contiguous memory cells. This reducesaccess time and lowers power requirements. Clock timings forFPM DRAM are typically 6-3-3-3 (meaning 3 clock cycles foraccess setup, and 3 clock cycles for the first and each of threesuccessive accesses based on the initial setup).
3. QDR-DRAMQuad Data Rate (QDR) DRAM can transfer up to four wordsof data in each clock cycle.Like Double Data-Rate (DDR)DRAM, QDR DRAM transfers data on both rising and fallingedges of the clock signal.QDR DRAM uses two clocks, onefor read data and one for write data and has separate read andwrite data buses (also known as Separate I/O), whereas DDRDRAM uses a single clock and has a single common data busused for both reads and writes (also known as Common I/O).QDR-SRAMThis is a Static RAM which has the same QDR features as theQDR DRAM.SDRAMThis is a Dynamic RAM, which uses capacitors as described inDDR-DRAM. This has synchronized with a system bus. Itwaits for a clock signal before responding to control inputs andis therefore synchronized with the computers system bus.SSRAMThis is Static RAM which has the same features as SDRAM.ZBT-SRAMThe ZBT memories are synchronous: they require a clockinput, and their inputs are only sampled on the rising edges ofthat clock.They are also pipelined, with the data bus beingdelayed by two cycles after the address and control signals. Inother words, if a read cycle is initiated on clock cycle n, thenthe data read from that address will be available on cycle n+2.
4. Similarly, for a write cycle, the data to be written is suppliedon cycle n+2.RDRAMRDRAM (Rambus Dynamic Random Access Memory) is amemory subsystem that promises to transfer up to 1.6 billionbytes per second. The subsystem consists of the random accessmemory (RAM), the RAM controller, and the bus (path)connecting RAM to the microprocessor and devices in thecomputer that use it.Direct Rambus (DRDRAM) is the latestversion and is expected to help accelerate the growth ofvisually intensive interfaces such as 3-D,interactive games,and streaming multimedia.RLDRAMRLDRAM memory is a low-latency, high-bandwidth DRAMthats designed for demanding networking tasks and L3 cache,as well as other applications that require back-to-backREAD/WRITE operations or completely random access.