Intro to Semiconductor IP Cores Provider CAST, Inc.

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Gives a brief company background and an overview of our IP Cores and Platform IP products for ASIC and FPGA electronic system design. Features BA22 32-bit processors, 8051 8-bit microcontrollers, H.264 video, JPEG image compression, and the memory controllers, high-speed interfaces, and other IP needed to build complete systems. (Updated November 2013).

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  • ===== ARM ====== Cortus === Tensilica ===
    BA2x Cortex-M0 Cortex-M3/4 Coldfire MIPS APS3 106Micro 108/212
    GPRs 32 16 16 16 16 16 16 32
    Instruction Length 16/24/32/48 16 16/32 32 32 16/32 16/24 16/24

  • 13
  • Data Storage Devices: SSD, Flash drives, Network Attached Storage
    Networking Equipment: Routers, Switches, Backhaul equipment etc
    Data/Web Servers
  • Intro to Semiconductor IP Cores Provider CAST, Inc.

    1. 1. CAST IP for ASICs and FPGAs: Introduction and Overview August 2016 www.cast-inc.com • +1 201.391.8300 • info@cast-inc.com
    2. 2. About CAST 100% focus on semiconductor intellectual property. We: Develop cores and integrate IP subsystems, Partner with select IP and verification IP (VIP) providers, and Source IP from application area experts Founded in 1993; delivering IP since 1996 Product standards and business practices refined over 20+ years of successful operation Have helped hundreds of customers ship millions of product units A successful, low-risk IP partner Privately held, financially stable Headquartered in NJ (USA), with international partner network CAST Intro & Overview2 CAST’s Experienced Team: Verifies IP Quality Boosts IP Reusability Guides Pre-Sale IP Choices Ensures Post-Sale IP Success
    3. 3. Expert Development Team CAST Intro & Overview3 All products developed by CAST or tightly-coupled partners 8051s Networking Stacks Multimedia Platforms Serial Communications High-Speed Buses System Integration Processor Subsystems AMBA Peripherals & Infrastructure IP 32-bit Processors & Subsystems; Image Encoding; Encryption Automotive Bus Interfaces Data Compression Video Encoding 8/16-bit MCUs Video Encoding Encryption
    4. 4. Extreme Customer Focus Global team of ~100 people CAST offices in USA, Brazil, and Europe Sales/support partners in Middle East and Asia 24/7 culture with very fast response Always online with Email, IM, home offices Actual IP developers available to help with support Experience with diverse customers and applications Pre-sales help in selecting the right IP Post-sales support during system integration CAST Intro & Overview4 Americas 55% Asia 32% Europe 13% Customers by Region
    5. 5. Customer Successes CAST Intro & Overview5 “iSine provides custom ASIC and SoC solutions to multiple market segments. The quality and support of CAST IP cores have saved us valuable time to market with these products. In this highly competitive environment, this advantage is critical to the success of our company. CAST has repeatedly and quickly helped us out of last-minute jams and multi-vendor IP interface issues.“ — Robert Gross Senior Engineer iSine, Inc. (see www.isine.com) GIT Japan Uses CAST 8051 in AIST’s MEMS-EFS Electrostatic Sensor “CAST’s efficient, easy-to- use 8051 core was an excellent solution for our challenge of building AIST’s innovative electrostatic field sensor system.” — Yoshinori Nakagawa, Design Engineer, GIT Japan
    6. 6. Customer Successes CAST Intro & Overview6 “The CAST CAN core has been successfully integrated into our new night vision camera product, which has already been shipped to one of our customers. The configuration of the core you have provided fit perfectly with our requirements so we decided to use it as is without any modification. Overall, I think that the core's performance was excellent, while the detailed documentation contributed a lot to the fast integration of the core into our system.”
    7. 7. Processors and Controllers BA2x 32-bit Processor Family: Royalty-free high performance with low power 8051 IP leader for many years Data Compression Lossless GZIP/ZLIB/Deflate Compress and Decompress Video and Image Compression Small and ultra-low-power Scalable efficiency to 4K, 8K, and beyond IP for Complete SoCs PCIe, CAN, SPI, and other Interfaces Ethernet MAC & IP Stacks Encryption, Memory Controllers, more Complete Processor Subsystems CAST IP Highlights CAST Intro & Overview7 Fastest-Available 8- & 16-bit 8051 Compatibles Most Code-Dense 32-bit Processors Most Power-Efficient 32-bit PipelineZero Processor Smallest/Most Capable Video & Image Codecs Lowest Latency H.264 Encoding Most Robust CAN FD soft core
    8. 8. IP Products DATA, VIDEO & IMAGE COMPRESSION Lossless Data Compression GZIP/ZLIB/Deflate; Ref. Design GUNZIP/ZLIB/Inflate H.264/AVC Encoders: Low-Power through Ultra-Fast; Intra-Only H.264/AVC Decoders: Low-Latency, Low-Power JPEG & Motion JPEG: Encoders & Decoders: Baseline, Extended 16-bit, Ultra-Fast Video Over IP Subsystems & Ref. Designs H.265/HEVC Decoder Network Stacks 1G/10G UDP/IP, RTP, MPEG Transport Stream Encapsulator SECURITY & ENCRYPTION AES, Programmable, GCM, Key Expander DES Single, Triple Hash Functions SHA-1, SHA-256, SHA-3 MD5 PERIPHERALS Device Controllers: Smart Card Reader NOR Flash Controllers: Serial & Parallel NOR Flash Network Stacks: MPEG Transport Stream UDP/IP Stack Hardware RTP Stack Data Link Controllers: SDLC & HDLC AMBA Infrastructure Cores & AHB 32-bit DMA Legacy Peripherals: DMA Controllers UARTs, Timer/Counter CONTROLLERS & PROCESSORS 32-bit BA2x Family Application Processors Full & Basic Embedded Processors Cache-Enabled Deeply Embedded PipelineZero Low-Power Dev & Debug Packages 8051 Compatibles: Super-Fast Advanced Fast & Mature; Tiny Legacy-Configurable 16-bit 80251s: Fast, Tiny 8 CAST Intro & Overview INTERCONNECTS CAN, CAN FD. Ref. Design I2C/SMBUS, LIN, SPI Ethernet MAC PCI Express X1/X4 & X8 controllers, app interface PCI Targets, Masters, Host Bridges & AHB interfaces
    9. 9. CAST Intro & Overview9
    10. 10. CAST Intro & Overview10 BA20: PipelineZeroTM Performance Efficiency Single-Cycle Instruction Execution Zero Delay Branches Hazards-free Smaller Silicon Footprint Less registers Simpler control logic (Pre-) Fetch Decode WriteExecute M4 Performance @ M0 Size 3.41 Coremarks/MHz @ 9,000 Gates!
    11. 11. BA2 Extreme Code Density ISA developed to better exploit state-of-the-art compilers Variable length instruction encoding 16-bit, 24-bit, 32-bit and 48-bit Compiler chooses smallest suitable encoding Denser code than fixed-length ISAs 32 GPRs mean for less load/store Load/store ~25% of code for typical programs on RISC CPUs uP Memories Memories o en occupy more silicon than the uP
    12. 12. Complete GNU Tool Chain for Windows or Linux Cycle-Accurate Instruction Set Simulator (ISS) JTAG & Serial Debugging Ported C libraries and OSs Software Build Tools BeyondStudio for Eclipse IDE: ISS, JTAG Debugging Support by Lauterbach TRACE32 Development Board Kits Talos Series Evaluation Kits Raptor for BA22-CE & BA22-AP BA2x System Development CAST Intro & Overview12
    13. 13. BA2x Customer-Proven ” We went from licensing the BA22 processor [to] tape-out in just five months. … Despite our stringent requirements, integration and software development was straightforward.” — Ram Rangarajan, Vice President, Imaging inSilica Beken Chooses BA22 Processor to Satisfy Tight Constraints in New Mobile Bluetooth Audio Chip ”.. Beken’s evaluation determined that their program code for the BA22 core fits in a 128KB memory, versus 170KB for the next-closest competitor…”
    14. 14. 8051 Cores Built on 16 years of 8051 experience Fifth-generation code, proven products Hundreds of core sales, scores of different applications & customers Shipped in hundreds of millions of customer units Solutions for quicker development and verification Seamless interface to Keil, and IAR 8051 software dev tools Embedded software debugging package Royalty-free licensing 14 CAST Intro & Overview “CAST’s 8051 controller offered the best combination of features, performance, and terms that we could find. The proven track record of both the 8051 core and the support team at CAST give us great confidence as we pursue this next great engineering challenge.” — Emad Afifi, VP Engineering Ensphere Solutions, Inc. March 2013
    15. 15. 8051-Compatibles 15 CAST Intro & Overview Up to 69.7x DMIPS/MHz of original 80C51 26.85x for 8-bit) Power usage from 2.3 µW/MHz CPU area from 6.6k gates S8051XC3 0.252 DMIPS/MHz - 26.85x faster than original Advanced power management support, including DFS R8051XC2 12.1x faster than original Mature code, shipping in millions of devices T8051XC3 Smallest-available, just 6.6K gates 13.5x speedup 450MHz or more L8051XC1 Matches timing and peripherals of older 8051-based MCUs Replaces obsolete parts, and/or enables reuse of your legacy code S80251XC3s 16-bit MCS-51 & MCS-251 Fast: 0.65 DMIPS/MHz, 69.7x speedup Tiny: < 13K gates
    16. 16. 8051 Cores CAST Intro & Overview16
    17. 17. Compression Cores Custom, Standalone Hardware IP Cores Require no software assistance Much lower power than software or hybrid codecs Low Power Video Compression JPEG & — Baseline and Extended Encoders & Decoders H.264/AVC — Baseline, Main, and High Profile Encoders & Baseline Decoder H.265/HEVC — Main, Main 10, Main 422 10/12 Profiles Decoder Lossless Data Compression GZIP/ZLIB/Deflate Compress & Decompress
    18. 18. Low-Power H.264/AVC Encoders Small for resource and power efficiency: less than half the silicon area of competing cores Extremely capable: UHD/4k on ASIC, HD/Full-HD on FPGA CAST Intro & Overview18 H254-E-BPS on 40nm:  61k um2 or 125k Gates  133k bits of RAM  UHD/4k@30 H254-E-BPS on Xilinx FPGAs:  16k LUTs, 25 BRAMs  1080p30 & 720p60 on Kintex-7  720p30 on Artix-7
    19. 19. Ultra-Fast H.264/AVC Encoders Versions with just 1 or 2 cycles per pixel Extremely capable: UHD/4k@60 in ASICs, UHD/4k@30 in FPGAs CAST Intro & Overview19 H254-E-BPS on 40nm:  300k Gates  300k bits of RAM  UHD/4k@60 H254-E-BPS on Xilinx FPGAs:  80k LUTs, 85BRAMs  UHD/4k@25 on Kintex-7  UHD/4k@25 on Ultrascale
    20. 20. Highlights — H.264/AVC Encoders Optimized for Low Bit-Rates Coding tools improve quality, e.g. De-blocking Filter Constant and Variable Bit Rate support Ultra-Low-Latency capable Adjust quality multiple times per frame for CBR Provide artifact-free intra refresh Optional multi-channel support Smooth system integration Easy native interface plus optional AHB & AXI wrappers Independent of memory type CAST Intro & Overview20
    21. 21. CAST Intro & Overview21 H264-E-BIS Low-Power I-Only Baseline Prof. Enc. H264-E-BPS Low-Power Base- line Profile Encoder H264-E-MPS Low-Power Main Profile Encoder H264-E-HIS Low-Power I-Only High Prof. Encoder H264-E-BPF Ultra-Fast Baseline Profile Encoder H264-E-MPF Ultra-Fast Main Profile Encoder ASIC (16nm) Performance UHD/4k@30 UHD/4k@30 1080p60 1080p60 UHD/4k@60 UHD/4k@60 Throughput (cycles/sample) 4 4 4 2.5 2 or 1 2 or 1 Area (Gates) 90k 150k 170k 100k 400k/800k 450k/900k Profile Constrained Baseline Constrained Baseline Main High 10 Intra Constrained Baseline Main Slice Types IDR IDR, P IDR, P IDR IDR, P IDR, P Chrome Formats 4:2:0 4:2:0 4:2:0 4:2:0 4:2:0 4:2:0 Multi-channel Optional Optional Optional ✖ Optional Optional Bits per Color 8 8 8 8, 10 8 8 Progressive/Inte rlaced ✔/ ✔ ✔/ ✔ ✔ / ✖ ✔ / ✖ ✔/ ✔ ✔ / ✖ CAVLC/CABAC ✔ / ✖ ✔ / ✖ ✖/ ✔ ✔ / ✖ ✔ / ✖ ✔/ ✔ CBR and VBR ✔ ✔ ✔ ✖ ✔ ✔ Intra-Refresh ✔ ✔ ✔ N/A ✔ ✔ Multiple Slices ✔ ✔ ✔ ✖ ✔ ✔
    22. 22. AVC/H.264 Decoder Cores CAST Intro & Overview22 H264-D-BP Low-Latency Baseline Profile Decoder H264-LD-BP Low-Power Base-line Profile Decoder Profile Constrained Baseline Constrained Baseline Profile Compatibility Full Limited to streams from H264-E-BPS/BPF/BIS Additional Features ✖ Interlaced with Main Profile Syntax Throughput (cycles/sample) 2.5 4 (or 2 or 1) Multiple Slices ✔ ✔ Silicon Resources ~500k Gates and 530k bits <100k Gates, and ~60k bits Low Latency No frame-buffer/ ~ 16 lines latency ✔ ✔ Flexible Memory Interface ✔ ✔ AXI Interfaces AXI Natively Supported Optional Wrappers for AXI Block To Raster Conversion Optional Optional
    23. 23. HEVC/H.265 Decoder Core Standalone Decoder Operate without any software assistance Custom Hardware Implementations Microcode-free design, with application specific memory hierarchy for lower external memory bandwidth CAST Intro & Overview23 H265-D-MP Main Profile Decoder Profiles Monochrome, Monochrome 10 Main, Main 10 Main 422 10, Main 422 12 Performance 4K/UHD@60fps in modern ASIC nodes 4k/UHD@25 on FPGAs Flexible Memory Interface ✔ AXI Interfaces ✔ Block To Raster Conversion ✔ Standalone Operation ✔  Lower Power than equivalent Software or Software/Hardware Encoders or Decoders
    24. 24. JPEG & Motion JPEG IP Cores Low-power, economical video compression MJPEG a de facto standard with wide support Low Silicon footprint and no-need for external - expensive and power hungry - SDRAM Much smaller and lower power than equivalent H.264, H.265, or JPEG200 encoders, with practically equal quality for moderate compression Ultra-fast: can process UHD/4K even in FPGAs Smooth system integration AXI-Streaming and APB interfaces Flexible memory interfaces CAST Intro & Overview24
    25. 25. JPEG Encoder and Decoder Cores CAST Intro & Overview25 JPEG-E-S Baseline JPEG Encoder JPEG-EX-S Extended JPEG Encoder JPEG-D-S Baseline JPEG Decoder JPEG-DX-S Extended JPEG Decoder JPEG-EX-F Ultra-Fast Extended JPEG Encoder JPEG-DX-F Ultra-Fast Extended JPEG Decoder Functionality Encoder Encoder Decoder Decoder Encoder Decoder Baseline JPEG ✔ ✔ ✔ ✔ ✔ ✔ Extended Sequential JPEG ✖ ✔ ✖ ✔ ✔ ✔ Motion JPEG Payload ✔ ✔ ✔ ✔ ✔ ✔ Image Resolution 16x16 to 64k x 64k Sub-sampling Formats Any with up to 4 components including single color, 4:4:4, 4:2:2, and 4:2:0 Bits per Color 8 8-12 8 8-12 8-12 8-12 Rate Control ✔ ✔ N/A N/A ✔ N/A Throughput (cycles/sample) 1 1 1 1 1-32 1-32 Silicon Resources (Gates) 50K 60K 55K 90k 80K (2 samples/cycle) 100k (2 samples/cycle) Availability Now Now July’2016 July’2016 Now August’2016 Low-Power Encoders Ultra-Fast Encoders
    26. 26. Video Over IP Subsystems CAST Intro & Overview26 Combine Encoder or Decoder with RTP and UDP/IP Hardware Stacks Ultra-low latency Flexible, with options for interfaces, memory, Ethernet or Wi-Fi integration, more FPGA Reference Design Kits enable rapid development jumpstart Customization services tailor it to your specific requirements
    27. 27. ZipAccel Data Compression Cores ZipAccel-C GZIP/ZLIB/Deflate Compression Core Highly configurable compression engine allowing different levels of compression efficiency, Throughput, and latency ZipAccel-D GZIP/ZLIB/Deflate Decompression Core High-throughput decompression engine Allows throughput scaling by parallel core instantiations
    28. 28. Lossless Data Compression Applications Compression used to increase the capacity of communication link and/or storage device
    29. 29. In-Line Compression in SoCs Mul port DDR Controller NVM Controller WiFi, Bluetooth, Zigbee Subsystem Ethernet, USB,PCIe Controller Processing Units (CPUs, GPUs, Accelerators), Local Memories, & other Peripherals • Reduce Flash, OTP, ROM Size • Faster Boot • Reduce Wireless Active Time & Save Power • Increase Bandwidth of High-Speed Interconnects • Reduce Central DRAM Traffic & Save Power Compression can reduce data storage and transfers by 2x to 3x, but MUST have low latency and small silicon footprint
    30. 30. CAN Bus Controller Core Broad standards support CAN 2.0 — A, B, & ISO (11898) CAN FD — ISO (11989-2) & Non-ISO TTCAN — Time-triggered (ISO 11898-4 level 1) Optimized for AUTOSAR and SAE J1939 RTL and netlists for ASIC or FPGA technologies Enhanced functionality: error analysis, listen-only and loop-back modes, ECC memories Flexible message buffering and filtering Easy integration: programmable, AMBA® options CAST Intro & Overview30
    31. 31. CAN FD Controller: Robust and Low-Risk Survived three CIA Plug Fests Real-world testing: diverse topologies, timing challenges, many vendors Proven with all popular transceivers In production use Avery VIP available Reference design board for easy eval. CAST Intro & Overview31 “The controller performed very well, with no major issues at higher than standard bit rates … Moreover, we coupled our data link controller core with the latest physical transceivers from On Semi, NXP, and Infineon, and were the only participants using these vendors’ latest CAN FD implementations.” – Dr. Frank Deicke, Fraunhofer IPMS Detroit Plug Fest April 6–7, 2016
    32. 32. IP Products DATA, VIDEO & IMAGE COMPRESSION Lossless Data Compression GZIP/ZLIB/Deflate; Ref. Design GUNZIP/ZLIB/Inflate H.264/AVC Encoders: Low-Power through Ultra-Fast; Intra-Only H.264/AVC Decoders: Low-Latency, Low-Power JPEG & Motion JPEG: Encoders & Decoders: Baseline, Extended 16-bit, Ultra-Fast Video Over IP Subsystems & Ref. Designs H.265/HEVC Decoder Network Stacks 1G/10G UDP/IP, RTP, MPEG Transport Stream Encapsulator SECURITY & ENCRYPTION AES, Programmable, GCM, Key Expander DES Single, Triple Hash Functions SHA-1, SHA-256, SHA-3 MD5 PERIPHERALS Device Controllers: Smart Card Reader NOR Flash Controllers: Serial & Parallel NOR Flash Network Stacks: MPEG Transport Stream UDP/IP Stack Hardware RTP Stack Data Link Controllers: SDLC & HDLC AMBA Infrastructure Cores & AHB 32-bit DMA Legacy Peripherals: DMA Controllers UARTs, Timer/Counter CONTROLLERS & PROCESSORS 32-bit BA2x Family Application Processors Full & Basic Embedded Processors Cache-Enabled Deeply Embedded PipelineZero Low-Power Dev & Debug Packages 8051 Compatibles: Super-Fast Advanced Fast & Mature; Tiny Legacy-Configurable 16-bit 80251s: Fast, Tiny 32 CAST Intro & Overview INTERCONNECTS CAN, CAN FD. Ref. Design I2C/SMBUS, LIN, SPI Ethernet MAC PCI Express X1/X4 & X8 controllers, app interface PCI Targets, Masters, Host Bridges & AHB interfaces
    33. 33. Conclusion: Why Choose CAST? Superior Processor, Compression, and Interconnect Products Controllers, Interfaces, and Functions to complete your SoC Royalty-Free Licensing and 20+ Years of IP Experience reduce your risks Learn more: visit www.cast-inc.com or call +1 201.391.8300 33 CAST Intro & Overview

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