Upavan Gupta

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Upavan Gupta

  1. 1. Upavan Gupta 3448, Park Sq. E. Apt 2 E-Mail: upavan@gmail.com Mobile: (813) 843-5546 Tampa, FL-33613, USA Web: http://www.cse.usf.edu/~ugupta Fax: (813) 974-1395 EDUCATION • Doctor of Philosophy - Computer Science and Engineering, Aug. 2008, University of South Florida, Tampa Advisor: Prof. Nagarajan Ranganathan GPA: 3.9/4.0 Dissertation: Utilitarian Approaches for Multi-Metric Optimization in VLSI Circuit Design and Spatial Clustering • Master of Science - Computer Science and Engineering, Dec. 2004, University of South Florida, Tampa Advisor: Prof. Nagarajan Ranganathan GPA: 3.86/4.0 Thesis: Multi-Event Crisis Management using Non-Cooperative Repeated Games • Bachelor of Computer Applications (Honors) - Computer Science, May 2002, International Institute of Professional Studies, Indore, India GPA: 9.0/10.0 RESEARCH INTERESTS • Spatial and Temporal Pattern Clustering • Game Theoretic Multi-Metric Optimization • Variation Aware VLSI Design Automation • Expected Utility based Optimization • Data Mining • Stochastic and Mathematical Programming • Decision Support Systems • Multi-Emergency Management • Resource Allocation and Scheduling • Search and Rescue Robotics PUBLICATIONS • U. Gupta and N. Ranganathan, “A Game Theoretic Approach for Simultaneous Compaction and Equi- Partitioning of Spatial Datasets”, IEEE Transactions on Knowledge and Date Engineering (T-KDE), 2009 (accepted). • U. Gupta and N. Ranganathan, “A Microeconomic Approach to Multi-Objective Spatial Clustering”, IEEE International Conference on Pattern Recognition (ICPR), pages: 1-4, 2008. • U. Gupta and N. Ranganathan, “An Expected-Utility Based Approach to Variation Aware VLSI Optimization under Scarce Information”, IEEE/ACM International Symposium on Low Power Electronics and Design, (ISLPED), pages: 81-86, 2008. • N. Ranganathan, U. Gupta, and V. Mahalingam, “Simultaneous Optimization of Total Power, Crosstalk Noise and Delay under Uncertainty”, ACM Great Lakes Symposium on Very Large Scale Integrated Circuits (GLSVLSI), pages: 171-176, 2008. • U. Gupta and N. Ranganathan, “Multi-event Crisis Management Using Non-cooperative Multistep Games”, IEEE Transactions on Computers (TC), 56(5): 577-589, May 2007. • N. Ranganathan, U. Gupta, R. Shetty, and A.K. Murugavel, “An Automated Decision Support System Based on Game Theoretic Optimization for Emergency Management in Urban Environments”, Journal of Homeland Security and Emergency Management (JHSEM), Berkeley Electronic Press, 4(2), Article 1, June 2007. (One of the Top Five Most Downloaded Papers, Sep. 2007) Upavan Gupta Page 1 of 7
  2. 2. • U. Gupta and N. Ranganathan, “A Microeconomic Approach to Multi-Robot Team Formation”, IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), pages: 3019-3024, 2007. • U. Gupta and N. Ranganathan, “Social Fairness in Multi-Emergency Resource Management", IEEE International Symposium on Technology and Society (ISTAS), pages: 1-9, 2006. • U. Gupta and N. Ranganathan, “FIRM: A Game Theory Based Multi-Crisis Management System for Urban Environments”, International Conference on Sharing Solutions for Emergencies and Hazardous Environments (SSEHE), American Nuclear Society, Salt Lake City, Utah, pages: 595-602, 2006. • U. Gupta, P. Rai, and F. Gazdhar, “Research in India – Thirsty and Breathless”, i-Maze, a National Conference on Digital Revolution and Future Economy, 2001. MANUSCRIPTS SUBMITTED • N. Ranganathan, U. Gupta, and V. Mahalingam, “An Integrated Approach to Multi-Metric Optimization of Delay, Dynamic Power, Leakage Power and Crosstalk Noise Considering Variations in Nanoscale VLSI Circuits”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2009. (minor revisions) • U. Gupta and N. Ranganathan, “A Risk Averse Utilitarian Approach to Variation Aware VLSI Optimization under Scarce Information”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2009. (in review) ACADEMIC AND PROFESSIONAL EXPERIENCE • Specialist, Computer Research - Office of the Provost and Senior Vice-President, Policy Analysis, Planning and Performance Group, University of South Florida, Tampa Aug. 2008-present Located in the FAIR (Faculty Academic Information Reporting) group of the Decision Support Systems division. Responsibilities include the following: o Investigation, interpretation and evaluation of faculty and administrative information in order to create analytical models for decision support, determination of the design and development directions for new data modeling, and development of new optimization and reporting techniques. o Research on the availability of the current industry software resources, perform cost constraint analysis, and viability study of such resources toward improvements in the FAIR system. o Programming, development and debugging, installation, operation, and maintenance of FAIR. • Graduate Teaching Assistant - Department of Computer Science and Engineering, University of South Florida, Tampa Course Instructor - Responsibilities involve independently designing the course structure, syllabus, assignments and projects, quizzes and exams, delivering in-class lectures and presentations, and grading. Courses taught as instructor: o Computer Logic Design Lab (CDA3201L.001S08) - Spring 2008 (34 students) o Computer Logic Design Lab (CDA3201L.001F07) - Fall 2007 (39 students) o Visual Basic .NET (ETG4931.901C06) - Summer 2006 (Session C) (27 students) o Visual Basic .NET (ETG4931.901F05) - Fall 2005 (22 students) o Operating Systems (COP4600.001C04) - Summer 2004 (Session C) (19 students) o Visual Basic (ETG4931.901S04) - Spring 2004 (37 students) o Visual Basic (ETG4931.901F03) - Fall 2003 (19 students) Teaching Assistant - Responsibilities involve assisting the instructor with grading and maintaining grades, holding office hours for helping students on regular basis and providing them feedback on their performance. Upavan Gupta Page 2 of 7
  3. 3. o Graduate Computer Architecture (EEL6764.001F07) - Fall 2007 (28 students) o Operating Systems (COP6611.001S07) - Spring 2007 (22 students) o Operating Systems (COP4600.002F06) - Fall 2006 (42 students) o Data Mining (CIS6930.003S06) - Spring 2006 (28 students) o Graduate Instruction Methods (CIS6940.001S06) - Spring 2006 (21 students) • Graduate Research Assistant - Dept. of Computer Science and Engineering, University of South Florida Advisor: Prof. Nagarajan Ranganathan Multi-Emergency Management Aug. 2004-Jul. 2005 o Study and evaluation of the various stages of the multi-emergency management life cycle, and the challenges faced by the federal agencies such as FEMA, NIMS etc. during such situations. o Development of a new Microeconomic Framework for Multi-event Crisis Management. This tool identifies the crisis events and the response units as players and resources in a multi-step game theoretic setup, and identifies a socially fair allocation of resources to the players using Nash equilibrium solution. o Development of a Decision Support System for Resource Optimization in Urban Emergency Environments. A single step, non-cooperative normal form game theoretic vehicle scheduling algorithm is developed. o Development Tools: C++, C, Visual Basic, Shell Scripts Platforms: Windows and Unix VLSI Circuit Optimization May 2007-Jul 2007, May 2008-Jul. 2008 o A new algorithm for Variation Aware Gate Sizing at the post-layout level. The algorithm is based on the concepts of expected utility theory and constraint risk minimization. It identifies a deterministic equivalent model of the stochastic optimization problem. o The methodology is variation distribution independent, and identifies solutions with high levels of utility. Multiple metrics like delay, power, crosstalk noise, and area can be simultaneously optimized. o Design and implementation of a new generalized variation aware Multi-metric Gate Sizing Framework, that can be used to perform optimization of several metrics like delay, leakage power, dynamic power, and crosstalk noise etc. The metrics can be relatively prioritized for optimization. The framework is implemented using the Fuzzy mathematical programming methodology. o Development Tools: C, Perl, Shell Scripts, VHDL, KNITRO, Synopsys Design Compiler, Cadence First Encounter RTL-to-GDSII Compiler, Fire & Ice Parasitic Extractor Platform: Solaris • Research Associate - Faculty Research, Office of the Provost, University of South Florida Advisor: Kevin R. Frenzel Sep. 2002-Aug. 2003 Involved in the FAIR (http://www.usf.edu/fair) project, which is a university wide Knowledge Management System that enables the easiest possible collection of academic information by or about faculty and administrators. o Design and development of a new Vita Converter and Management Tool that performs automatic extraction of the information from the non-standard vita and converts it to standard vita forms like APA and MLA. The automatic generation of the NIH, NSF and other abbreviated format vitas that can be used for grant submissions. o Development of a completely interactive tutorial of the FAIR system. This automated tutorial is used for the training purpose to enable new users to effectively utilize the system. o Involved in the analysis, design, development, and enhancement of features and maintenance of FAIR. o Development Environment: ASP, ASP .net, C#, JavaScript, ASPGrid, Cute Rich Text Editor, HTML, MS-SQL Server 2000/2005, Visual Studio .net, SMTP Mail Server, IIS 6.0 Web Server • Research Assistant - e-SCI Development Center, Intl. Institute of Professional Studies, Indore, India Advisor: Dr. A.K. Ramani Jan. 2001-Dec. 2001 Upavan Gupta Page 3 of 7
  4. 4. o Conceptualization and Development of Virtual University, an online distance-education system developed to provide online courses. The system keeps track of all the users (learners) and their progress. o Development Environment: HTML, ASP, VBScript, SQL Scripts, MS-SQL Server • Summer Intern - Tomahawk Software (India) Pvt. Ltd., Bangalore, India May 2000-Jul. 2000 o Design and development of a new Mail Archival System for the company. The software performs pattern classification and data mining to categorize the emails on the basis of the category it belongs to. o Development Environment: Visual Basic and MS Access TECHNICAL SKILLS Programming: C++, C, C#, Java, SAS, MATLAB Scripting: Perl, Shell Script, MS-SQL, HTML, ASP, ASP .NET 2.0, Java Script Databases: SQL Server 2000/2005, MS Access Platforms: Windows (95/98/00/XP), UNIX, SUN SOLARIS, Visual Studio .net Software Packages: Microsoft Office, MathCAD, LaTeX, AMPL and LINDO (LP solvers), WEKA Data Mining Toolkit, Visual Studio, ASPGrid VLSI-CAD Packages: Cadence Tools – Virtuoso, BuildGates, First Encounter RTL-to-GDSII compiler, floorplan compiler, Amoebaplace, NanoRoute, Fire & Ice Parasitic extractor, Nclaunch, SignalStrom, CeltIC. Synopsys Tools – Design Compiler, Star-RCXT, Nanosim Graduate Coursework:Mathematical Statistics I, Mathematical Statistics II, Graph Theory, LP & Network Optimization, Risk & Decision Analysis (audit), Machine Learning, Computer Algorithms, Digital Image Processing, Operating Systems, Computer Architecture, Computer Networks – I & II Management Courses:Accounts and Financial Management, Principles and Practices of Management, IT and Project Management, Financial Management (audit) SAMPLE COURSEWORK PROJECTS • Semi-Supervised Text Classification - Labeled and unlabeled data is used to classify text documents into representative classes using Naive Bayes and Expectation Maximization (EM) algorithms. (CIS6930 – Machine Learning) • Implementation of Machine Learning Concepts - Various machine learning concepts such as version spaces, decision tree learning, advanced neural networks, learning theory, ROC analysis, hypotheses evaluation, reinforcement learning, utilizing ensembles of classifiers, bagging and boosting, instance-based learning, rule learning, and support vector machines were learned through assignments and small projects. (CIS6930 – Machine Learning) • Image Processing Algorithms - Histogram equalization of gray-scale and colored images, image smoothing, image filtering, noise and distortion removal, image segmentation using Laplacian and gradient descent methods, edge detection, RGB to HSI image conversion, and Morphological image processing. (CAP5400 – Digital Image Processing) • Hyperspace: A high-level synthesis system - a HLS system that automatically generates the RT-level design specifications from behavioral descriptions. The system performs scheduling, register and functional unit allocation and binding, Netlist and datapath generation, and controller and test-bench generation. (CIS6930 – Digital Circuit Synthesis) Upavan Gupta Page 4 of 7
  5. 5. • Reduction of Leakage Power in Low Vth Designs - a project aimed at the reduction of leakage power through the utilization of the slack available in each path. This is achieved by developing a variation aware threshold voltage scaling algorithm. The algorithm is tested on the ISCAS'85 benchmarks. (CIS6930 – VLSI Algorithms and Architectures) • An ASIC chip for Digital Thermometer - The chip stores and displays the minimum, maximum, current and average temperature in degree centigrade and degree Fahrenheit scale. In the test mode, the device is checked for the correct working of all the internal components. Fabricated by MOSIS. (CIS6930 – CMOS VLSI Design) • Optimal Routing of Data Packets over Optical Network - A Genetic algorithm developed for optimal virtual topology identification in a wavelength-routed optical network, given the nodes and traffic matrix. (CIS6930 – Computer Networks I) • Performance Evaluation of Computer Networks - Capacity planning, system design, and performance measurement using ping, traceroute, SNMP, Cisco Netflow, queuing theory and analytical modeling. Performance prediction using stochastic processes and Markovian modeling, and network traffic characterization, traffic simulation, and modeling of switch architectures.(CIS6930 – Computer Networks II) • DNA: a Device Driver for RealTek's RTL8139 Network Adapter - A modular device-driver, which is automatically detected and initialized at the boot time and has 8 modules; init, open, transmit, receive, statistics, interrupt, close, cleanup. It successfully accomplishes the task of transmission and reception of data packets across the network. A test network was established to test the driver. (Undergraduate Senior Project) AWARDS AND HONORS • USF Graduate Council Outstanding Thesis/Dissertation Award for the year 2007-2008. Recognized in the dissertation category for exemplary scholarship that demonstrated high potential impact in the field of computer science and engineering. • Richard E. Merwin Scholarship ($3000) - Outstanding contributions to IEEE Computer Society (IEEE-CS) and excellence in academic achievements, 2004 • Travel Award - Poster Presentation at the USF Interdisciplinary Student Research Symposium, organized by NSF IGERT and NSF Bridge to the Doctorate Program, 2005, 2006, 2007 ($500 each year) • IEEE Outstanding Chapter Award, 2004 - IEEE-CS Student Chapter at USF received this international award for providing the membership with the best overall set of programs and activities. The chapter received this award during my presidential term. • USF Computer Science and Engineering Department nomination for the Provost’s Award for Outstanding Teaching Assistant. ACTIVITIES AND AFFILIATIONS • Technical Program Committee Member – IEEE ISVLSI’2009 • Supervisory - Co-supervised the Under-Graduate Honors Thesis of Bijal Chhadva, Titled: A Graphical User Interface for Multi-event Crisis Management. • Reviewer - IEEE-Transactions of Design Automation of Electronic Systems (TODAES), Risk Analysis Journal, IEEE Transactions on Systems, Man and Cybernetics (Part B) (SMC-B), IEEE Conference on Automation Science and Engineering (IEEE-CASE), IEEE Conference on Computer Architecture and Machine Perception (IEEE-CAMP), IEEE/ACM International Conference on Computer Aided Design (ICCAD), IEEE ‘Computer’ magazine, IEEE International Conference on VLSI Design, ACM Great Lakes Symposium on VLSI Systems (GLSVLSI), ACM - ISLPED Upavan Gupta Page 5 of 7
  6. 6. • Organizing Committee - o IEEE Computer Society Annual Symposium on VLSI (ISVLSI’05), Tampa May 2005 o i-Maze, a National Conference on Digital Revolution and Future Economy, India Oct. 2001 • President - IEEE Computer Society (IEEE-CS) Student Chapter at USF (Two Terms) Aug. 2003–Jul. 2005 • Secretary and Special Events Coordinator - ACM Student Chapter at USF Jan. 2003–Aug. 2004 • Member - IEEE, IEEE-CS, IEEE Florida West Coast Society, Students of India Association at USF. OTHER INFORMATION • Date of Birth: April 12th, 1980 • Citizenship: India • Visa Status: International Student F1 • Reference: Available on request DISSERTATION Topic: Utilitarian Approaches for Multi-Metric Optimization in VLSI Circuit Design and Spatial Clustering Examining Committee: o Nagarajan Ranganathan, Ph.D. (Major Professor) o Dewey Rundus, Ph.D. (Member) o Srinivas Katkoori, Ph.D. (Member) o Kandethody M. Ramachandran, Ph.D. (Member) Date of Approval: May 30, 2008 Abstract: In the field of VLSI circuit optimization, the scaling of semiconductor devices has led to the miniaturization of the feature sizes resulting in a significant increase in the integration density and size of the circuits. At the nanometer level, due to the effects of manufacturing process variations, the design optimization process has transitioned from the deterministic domain to the stochastic domain, and the inter-relationships among the specification parameters like delay, power, reliability, noise and area have become more intricate. New methods are required to examine these metrics in a unified manner, thus necessitating the need for multi-metric optimization. The optimization algorithms need to be accurate and efficient enough to handle large circuits. As the size of an optimization problem increases significantly, the ability to cluster the design metrics or the parameters of the problem for computational efficiency as well as better analysis of possible trade-offs becomes critical. In this dissertation research, several utilitarian methods are investigated for variation aware multi-metric optimization in VLSI circuit design and spatial pattern clustering. A novel algorithm based on the concepts of utility theory and risk minimization is developed for variation aware multi- metric optimization of delay, power and crosstalk noise, through gate sizing. The algorithm can model device and interconnect variations independent of the underlying distributions and works by identifying a deterministic linear equivalent model from a fundamentally stochastic optimization problem. Furthermore, a multi-metric gate sizing optimization framework is developed that is independent of the optimization methodology, and can be implemented using any mathematical programming approach. It is generalized and reconfigurable such that the metrics can be selected, removed, or prioritized for relative importance depending upon the design requirements. In multi-objective optimization, the existence of multiple conflicting objectives makes the clustering problem challenging. Since game theory provides a natural framework for examining conflicting situations, a game theoretic algorithm for multi- objective clustering is introduced in this dissertation research. The problem of multi-metric clustering is formulated as a normal form multi-step game and solved using Nash equilibrium theory. This algorithm has useful applications in several engineering and multi-disciplinary domains which is illustrated by its mapping to the problem of robot team formation in the field in multi-emergency search and rescue. The various algorithms developed in this dissertation achieve significantly better optimization and run times as compared to other methods, ensure high utility levels, are deterministic in nature and hence can be applied to very large designs. The algorithms have been rigorously tested on the appropriate benchmarks and data sets to establish their efficacy as feasible solution methods. Various quantitative sensitivity analysis have been performed to identify the inter-relationships between the various design parameters. Upavan Gupta Page 6 of 7
  7. 7. MASTERS’ THESIS Topic: Multi-Event Crisis Management Using Non-Cooperative Repeated Games Date of Approval: November 19, 2004 Abstract: The optimal allocation of the resources to the emergency locations in the event of multiple crises in an urban environment is an intricate problem, especially when the available resources are limited. In such a scenario, it is important to allocate emergency response units in a fair manner based on the criticality of the crisis events and their requests. In this research, a crisis management tool is developed which incorporates a resource allocation algorithm. The problem is formulated as a game theoretic framework in which the crisis events are modeled as the players, the emergency response centers as the resource locations with emergency units to be scheduled and the possible allocations as strategies. The pay- off is modeled as a function of the criticality of the event and the anticipated response times. The game is played assuming a specific region within a certain locality of the crisis event to derive an optimal allocation. If a solution is not feasible, the perimeter of the locality in consideration is increased and the game is repeated until convergence. Experimental results are presented to illustrate the efficacy of the proposed methodology and metrics are derived to quantify the fairness of the solution. A regression analysis has been performed to identify the statistical significance of the results. Upavan Gupta Page 7 of 7

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