SoC Subsystem Manager Data Sheet


Published on

SoC Subsystem Manager Data Sheet

Published in: Technology
1 Like
  • Be the first to comment

No Downloads
Total views
On SlideShare
From Embeds
Number of Embeds
Embeds 0
No embeds

No notes for slide

SoC Subsystem Manager Data Sheet

  1. 1. Data Sheet SoC System Manager Subsystem (SSM) Policy Based System Management Control SSM is the industry’s first semiconductor IP subsystem to offer global SoC system management control based on software driven policies. SSM consists of a SSM Controller, SSM MCBs (in red above), which connect to each of the IP blocks, and an SSM control plane. Software policies are created that define global system functions, such as reset and boot sequencing, power and security management overlays, error recovery and exception handling, or even firmware version updating and testing. During run time, these policies are loaded into the SSM Controller, which converts them to SSM defined commands and transports them over the SSM control plane to the SSM MCBs. The SSM MCBs and map their SSM commands to the control signals of the appropriate IP blocks. SSM commands provide both control and status information for bidirectional communications between the SSM Controller and the SSM MCBs.. User defined messages can also be sent between the SSM Controller and the SSM MCBs. Policies can be loaded into the SSM Controller SRAM at any time and by any IP block. If the host processor is chosen to load the policies, applications and the main operating system are able to utilize the host processor as a conduit to drive global system functions to the IP blocks. For example, implementing global power management overlays triggered by the application’s operational state can compliment the local IP block power management schemes while avoiding out of band signaling or interconnect arbitration logic dependencies. Linkage to the application’s state offers new windows of opportunity to toggle unused IP blocks as the application sequences through its tasks.© 2012 ChipStart LLC All Rights Reserved
  2. 2. Data Sheet SoC System Manager Subsystem (SSM) Direct Coupling of Global Hardware State Management with Embedded Software Operation High Level Requests For System Management Policies SSM policies are made up of a list of SSM commands that are chained together. The SSM Controller maintains a location map with a unique identifier for an SSM MCB connected to each of the IP blocks. The SSM MCBs connect externally to the IP block (no IP block modifications necessary). When the SSM Controller receives a policy it executes the commands from the SSM command list. These commands can be partially or completely executed by the SSM Controller independent from any other resources (such as the host processor). The SSM Controller commands can be bytes or words that are written to the SSM MCB registers through a register-write interface. The SSM MCB register blocks convert the SSM commands into hardware signals that control the operations of the IP block.. MCBs are static in default operation. MCBs can also be made intelligent by adding state machines. This is advantageous for complex IP blocks that require larger command chains to execute. By distribution intelligent MCBs and sending them their own command chains, policies with long lists can be parsed and executed in parallel, reducing any inherent delays from executing the same lists using a serial process that may take a long time to complete. In this mode, the SSM Controller acts as a master device, transferring the command chains and maintaining global coordination. The status bits contained in the bytes allow the SSM Controller to remain coordinated with the intelligent MCBs with no additional design overhead. The SSM Controller also maintains its own status registers which can be read by software for synchronization with applications software and operating systems as the underlying hardware in the IP blocks change state. Simple drivers can be developed to enable communications through well known software mechanisms (with no specific hardware knowledge). The drivers send SSM commands to the SSM Controller or poll/read the SSM Controller register interface. This also enables SSM to be used for collecting statistics on global state operations in real time, which can be fed back to a host processor to help determine next policy choices. SSM offers the opportunity to create full closed loop state management that ushers in adaptive SoC operations by application.© 2012 ChipStart LLC All Rights Reserved
  3. 3. Data Sheet SoC System Manager Subsystem (SSM) SSM Enables SoC Teams to Adapt a Driver Development Process for SoC System Management SSM supports a default set of system management command primitives that are unconditionally executed (direct command), or conditionally executed (based on user defined message passing with IP blocks). Modifications and additions can be accommodated through SSM firmware changes. The default set of commands are:Power ManagementSSM manages both static and dynamic power overlays by connecting directly to the IP block logicwhich controls clock, voltage, standby, and other necessary signal pins via the SSM MCBs. Anycombination of power management policies can be employed, including a unique architecture levelglobal power management (which manages power consumption on an application and basis).Power management policies can be developed for each application supported by the SoC andcontext switched by the applications.Security ManagementSSM control signal combinations can be utilized to enforce a wide range of security policies. Thesimplest form is to power down the IP block if a there is a violation. SSM’s MCBs also supportmessage passing, which can be used to conditionally control unique sets of signals or to sendinformation directly between the SSM Controller and an IP block.Error Recovery ManagementConnecting SSM MCBs to the IP block logic which controls interrupt and control signals enablesSSM to initiate or aide in an error recovery routine sequence. The SSM Controller manages criticalhardware states system-wide as recovery routines are performed and offers deterministic recyclingof the system operations.Boot Sequencing ManagementUser defined boot sequences are managed by SSM through a JTAG interface. Many bootsequences combinations can be supported using the same scheme simply by loading new firmwareinto flash.
  4. 4. Data Sheet SoC System Manager Subsystem (SSM) Small Footprint, Low Power, and Extendable SSM requires low active power and supports a small footprint. SSM also supports an automatic sleep/wake up mode to minimize standby power consumption. Feature changes can also be accommodated to tailor a specific SSM software instantiation in order to meet a specific set of needs while maintaining the scalability and compatibility across product lines. SSM Default Hardware Characteristics Process:: TSMC CL013G High-Vt Area: 0.065 mm2 (includes 4K Bytes RAM) Power: ~0.02 mW/MHz The SSM control plane is a small token ring-type control plane. A total of 36 signals move point-to-point around the chip and may be adapted to any clock rate (usually the lowest in the system). It can be pipelined to allow it to run with a very high clock rate. Static SSM MCBs are configurable but typically less than 100 gates each. SSM Default Software Memory Requirements SSM Controller Memory: 4K Bytes RAM typical (varies with number of IP Blocks supported) Typical Policy Sizes: 100K-200K Bytes SSM policies typically reside in external DRAM or Flash. Each policy is loaded into the SSM Controller’s SRAM for execution. For more information contact: ChipStart LLC 228 Hamilton Avenue, 3rd Floor Palo Alto, CA 94301 United States Toll Free: (855) IP-MATTERS Phone: +1 (650) 204-7883 Email:© 2012 ChipStart LLC All Rights Reserved