Chipstart SoC System Manager (SSM) Non-NDA Overview


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As complex SoCs continue to evolve towards platforms capable of supporting thousands of applications, so is the complexity of architecting, testing and assuring the multitude of hardware state changes on the SoC that grow at an exponential rate because of the multicore nature of SoCs and the programmable processors used on them.

The paper submitted and this presentation focuses on the growing challenges of management boot and reset sequencing, error recovery, and even power and security management which we combined to call system management, and how system management can be optimized under very complex operations.

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Chipstart SoC System Manager (SSM) Non-NDA Overview

  1. 1. Optimizing System Managementin the Platform SoC EraHoward PakoshPresident & CEOChipStart LLC
  2. 2. Today’s Performance SoCs RequireComplex System Management Samsung Apps Processor (iPhone3) OMAP 4 4+ Compute Engines 4-5 Memory Interfaces More than 1000 Applications How Do You Guarantee Proper Hardware State Changes for +1000 Applications?
  3. 3. System Management Complexity Has Past a Key Threshold Multiple Application Limited System Management for Multi- Sequencing sequencing Means Complex System 2010 (Complex (aka random) Operation Verification and H/W state changes) High Risk Cost/TTM Tradeoffs When Using Traditional Methods Single Application 2005 Sequencing (Simple H/W State Changes) 2000 Interconnect/Dataflow (Performance Testing) IP Block (functional test) 1995SoC System Operation 10X 100X 1000X Verification Tasks System Operation Verification ComplexitySource: Advance Tech Marketing (Logarithmic)
  4. 4. High Risk Cost/TTM Tradeoffs Now DrivenBy Inadequate SoC Architecture• Traditional (Host CPU acts as System Manager) Host IP CPU Core Host CPU no longer has adequate visibility and control For complex Multicore SoCs IP I/O Core• Interconnect Based (Adding Control to Data Flows) Host IP IP CPU Core Core Control functions complicate global interconnect design, experience execution delays, and degrades efficiency IP I/O IP Of high performance data flows Core Core These Approaches Were Not Designed to Manage 1000+ Applications Using the Same Device
  5. 5. Control Plan ArchitecturesReduce Complexity and Ease Tradeoffs• Separation of control and data planesmake BOTH more efficient CPU DSP Media Engine• Independent controller has System Controller Global Interconnectadequate visibility for effective control Low Speed DRAM High Speed Controller I/O I/O• Programmable state management Control Plane delivers new levels of software/hardware coupling and implementation flexibility required for high numbers of applications• Subsystem IP approach delivers new abstraction layers thatenables system management development acceleration and highreuse
  6. 6. Semico Forecasts High System Management IP Growth $180 $1,000 $160 $900 $800 $140 $700 $120 $600 Total M DollarsM Dollars $100 $500 $80 $400 $60 $300 $40 $200 $20 $100 $0 $0 2010* 2011* 2012* 2013* 2014* 2015* Multi Media System Resource Mgmt. Memory Security Computing Communications Video Total
  7. 7. Transforming SoC Architecture Using System Management Subsystem IP• Complexity levels now dictate that System Management become an architecture element not an implementation afterthought• Control plane architectures introduce new flexibility that improves system management effectiveness and promote high reuse• Subsystem IP approach introduces the abstraction layers needed to cost effectively manage the system operation complexity explosion Make vs. Buy Rapidly Favoring Outsourcing