Successive Approximation ADC

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This presentation illustrates the experience gained by me while working on fabricating a Successive Approximation ADC on a MOSIS chip. This was part of a project-oriented course at UT. The chip is currently being fabricated by MOSIS and will be available by mid-April for testing.

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Successive Approximation ADC

  1. 1. EECS 631: FINAL PROJECT Successive Approximation ADC Project Team: Ankit Master Kevin Tham
  2. 2. Design Specifications • Dynamic Range: 0 – 4V • Supply Voltage: 5V • Resolution: 7-bit • 1 LSB: 31.25mV • Speed/Clock Frequency: 10 MHz • Sampling rate : 100 ksps Ankit Master & Kevin Tham University of Tennessee, Knoxville
  3. 3. Architecture Complete architecture implementation (Ref: CMOS Analog Circuit Design by Allen & Holdberg) Ankit Master & Kevin Tham University of Tennessee, Knoxville
  4. 4. Logic module Ankit Master & Kevin Tham University of Tennessee, Knoxville
  5. 5. 1) Vin = 0.9 V Logic Operation Step Q6Q5Q4Q3Q2Q1Q0 B’6B’5B’4B’3B’2B’1B’0 Vdac_out (V) Vcomp B6B5B4B3B2B1B0 1 1000000 1000000 2 1 0000000 2 0100000 0100000 1 1 0000000 3 0010000 0010000 0.5 0 0010000 4 0001000 0011000 0.75 0 0011000 5 0000100 0011100 0.875 0 0011100 6 0000010 0011110 0.9375 1 0011100 7 0000001 0011101 0.89625 0 0011101 2) Vin = 2.3 V Step Q6Q5Q4Q3Q2Q1Q0 B’6B’5B’4B’3B’2B’1B’0 Vdac_out (V) Vcomp B6B5B4B3B2B1B0 1 1000000 1000000 2 0 1000000 2 0100000 1100000 3 1 1000000 3 0010000 1010000 2.5 1 1000000 4 0001000 1001000 2.25 0 1001000 5 0000100 1001100 2.375 1 1001000 6 0000010 1001010 2.3125 1 1001000 7 0000001 1001001 2.28125 0 1001001
  6. 6. Pre-layout simulation
  7. 7. Layout Ankit Master & Kevin Tham University of Tennessee, Knoxville
  8. 8. Post-Layout simulation
  9. 9. Reset circuitry Ankit Master & Kevin Tham University of Tennessee, Knoxville
  10. 10. Pre-layout Simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  11. 11. Layout Ankit Master & Kevin Tham University of Tennessee, Knoxville
  12. 12. Post-layout simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  13. 13. Opamp Ankit Master & Kevin Tham University of Tennessee, Knoxville
  14. 14. Post-layout simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  15. 15. DAC module Ankit Master & Kevin Tham University of Tennessee, Knoxville
  16. 16. DAC Layout Ankit Master & Kevin Tham University of Tennessee, Knoxville
  17. 17. Post-layout simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  18. 18. Track and hold Left: Schematic Bottom: Layout
  19. 19. Comparator module Ankit Master & Kevin Tham University of Tennessee, Knoxville
  20. 20. Comparator Layout Ankit Master & Kevin Tham University of Tennessee, Knoxville
  21. 21. Top level Design Ankit Master & Kevin Tham University of Tennessee, Knoxville
  22. 22. Pre-layout Simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  23. 23. Post-layout Simulation Ankit Master & Kevin Tham University of Tennessee, Knoxville
  24. 24. Padframe Ankit Master & Kevin Tham University of Tennessee, Knoxville

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