Introduction to stm32-part2

Introduction to STM32

Course Objective
After completing this course, you will answer:
What is ARM Cortex Processor?
What is the STM32 SoC?
What are STM32 building blocks?
Amr Ali Abdel-Naby@2011 Introduction to STM32

Course Notes
Set your cell phone to vibrate.
I assume you know computer architecture.
Ask any time.

Course References
The Definitive Guide to the ARM Cortex-M3, 2 nd Edition
www.arm.com
www.st.com/stm32
www.doulos.com

Course Outline
Introduction
Cortex Overview
CMSIS
STM32 System Architecture
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

A Glance at STM32 Amr Ali Abdel-Naby@2011 Introduction to STM32

Performance and Access Lines Amr Ali Abdel-Naby@2011 Introduction to STM32

System Architecture
Multiple bus access
Efficient DMA and rapid data flow
Increased peripheral speed for better performance

Memory Mapping and Boot Modes Amr Ali Abdel-Naby@2011 Introduction to STM32

Clock Schemes
2 external oscillators
2 internal oscillators
1 PLL

Clocking Configurations Amr Ali Abdel-Naby@2011 Introduction to STM32

Direct Memory Access
7 independent configurable channels
HW or SW requests on each channels
Memory-to-memory, memory-to-peripheral, peripheral-to-memory transfers
SW programmable priorities
HW priority in case of equality
Programmable and independent transfer
Byte, ½ word, word
source-destination independent

DMA Mapping
Each DMA channel is controlled by:
4 registers
3 interrupts
Transferee complete
Half transfer
Error

Course Outline
Introduction
Cortex Overview
CMSIS
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

General Purpose Input Output
80 multifunction bi-directional IO
5 x 16-pin ports
GPIOA … GPIOE
Each pin can work as:
GPIO
Alternate function
External interrupt
In addition, drive c/cs can be configured.
Bit manipulation is allowed.

GPIO Configuration Modes Amr Ali Abdel-Naby@2011 Introduction to STM32

Alternate Functions/Event Control
AF remaps GPIO pin to a peripheral function.
USART, SPI…
A remap register controls:
JTAG configuring
Mapping pins to alternate functions
Event control can generate events.
Events can wakeup another CPU.

External Interrupts
19 EXTIs
16 connected to the GPIOs
Remaining 3 are connected to:
RTC
USB Wake
Power voltage detection
Each of the 16 EXTIs can:
Connect to any of the GPIO pins
Generate an event on interrupt
Use by WFI or WFE

EXTI Configuration Amr Ali Abdel-Naby@2011 Introduction to STM32

Analog to Digital Converter Amr Ali Abdel-Naby@2011 Introduction to STM32

Modes of Operation Amr Ali Abdel-Naby@2011 Introduction to STM32

Dual Conversion Modes Amr Ali Abdel-Naby@2011 Introduction to STM32

Simultaneous Modes Amr Ali Abdel-Naby@2011 Introduction to STM32

Combined Mode Amr Ali Abdel-Naby@2011 Introduction to STM32

Interleaved Modes Amr Ali Abdel-Naby@2011 Introduction to STM32

Alternate Trigger Mode Amr Ali Abdel-Naby@2011 Introduction to STM32

Combined Regular Simultaneous/Alternate Trigger Mode Amr Ali Abdel-Naby@2011 Introduction to STM32

Combined Injected Simultaneous/Alternate Trigger Mode Amr Ali Abdel-Naby@2011 Introduction to STM32

Timers
1 x advanced timer for motor control + 3 x general purpose timers
16-bit counters with 16-bit prescalars and autoreload
Count up, count down, and centered counting

Capture Compare Unit
Capture mode:
Can capture an external event twice to:
Halt or reset the CPU
Generate an interrupt
Can measure the period and the duty cycle of an external PWM
Can interface to a linear or a rotary encoder
Determines speed, direction, and position of a device
Compare mode:
Can compare a captured value to current timer value
Generate an interrupt if detected
Change compare o/p
Can generate PWM with period stored in timer and duty stored in capture unit
One shot or periodic

Advanced Features
Break function (Advanced timer only)
Based on a break input or CSS event the PWM can be put into a safe state
Hall sensor interface
Measure angular speed of a motor
Timers synchronization
Different timers can be synchronized together to form complex timer arrays.

RTC and Backup Registers
In backup power mode, we have:
RTC
Independent WDT
10 x 16-bit registers to store critical values

Serial Peripheral Interface
2 x SPI peripherals
1 on the high speed bus
1 on the low speed bus
Each can be a master/slave
2 x DMA channels
2 x CRC units
CRC8 or CRC16
1 for transmit
1 for receive
5 x interrupt sources

Inter Integrated Circuit
2 x I2C peripherals
Each can be a master/slave
2 x DMA channels
1 x PEC (Packet Error Check)
Supports CRC8
14 x interrupt requests
Can support SMB (System Management Bus) and PMB (Power Management Bus)

USART
3 x USARTs
1 on the high speed bus
2 on the low speed bus
2 x DMA channels
10 x interrupt sources
IrDA, LIN, Modem, smart card support

USART Example Usages Amr Ali Abdel-Naby@2011 Introduction to STM32

CAN Controller
CAN2.0A and CAN2.0B support
Time-Triggered CAN (TTCAN) support
Automatic messaging
3 x transmit mailboxes
2 x receive mailboxes
Receive message filtering
To avoid broadcasting over processing
Silent mode and loopback modes

Universal Serial Bus
8 x end points
Control, interrupt, bulk, and isochronous modes of transfer
Double buffering for isochronous mode
Shares RAM with CAN
A powerful USB stack is available from ST

Course Outline
Introduction
Cortex Overview
CMSIS
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

RUN Mode
Highest level of power consumption
You can reduce power consumption by:
Gating clocks of any unused peripherals
Switching of unneeded clock sources

SLEEP Mode
Entered by WFI or WFE
Only CPU halts
Left by an interrupt/event
You can reduce power consumption by disabling unneeded peripherals except those who will cause the wakeup.

STOP Mode
Entered by WFI or WFE with SLEEPDEEP set and Power Down Deep Sleep bit cleared
All devices halt except memories and EXTI.
Wakes up by EXTI or RTC

Standby Mode
Entered by WFI or WFE with SLEEPDEEP set and Power Down Deep Sleep bit set
STM32 is really off
Wakeup is like a reset
Wakes up by:
RTC
Reset or WDT reset
Rising edge on GPIOA0

Extra Features
A backup region will be kept always alive contains:
A battery backed RAM
RTC
It is possible to configure the CoreSight debug to work on low power modes.

Course Outline
Introduction
Cortex Overview
CMSIS
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

Multiple Reset Sources Amr Ali Abdel-Naby@2011 Introduction to STM32

Power Voltage Detect Amr Ali Abdel-Naby@2011 Introduction to STM32

Clock Security System Amr Ali Abdel-Naby@2011 Introduction to STM32

Watchdog Timers Amr Ali Abdel-Naby@2011 Introduction to STM32

Peripherals Security
GPIO locking
Analog watchdog input
Break input

Course Outline
Introduction
Cortex Overview
CMSIS
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

Embedded Flash
Byte loader
Prefetch buffer
3 regions:
Main program memory
4K pages write operations
1000 cycles write endurance
30 years data retention at 85C
Big information block
2 KB
Holds factory programmed bootloader
Small information block
8 configuration bytes
Defines reset properties and memory protection

Course Outline
Introduction
Cortex Overview
CMSIS
Peripherals
Low Power Operation
Safety Features
The Flash Module
Development Tools

Development Tools
Compilers
gcc, Keil, IAR…
Evaluation boards
Debuggers
RTOS, libraries, protocol stacks

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Introduction to stm32-part2

by amraldo on Apr 03, 2011

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