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I3 multicore processor
 

I3 multicore processor

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    I3 multicore processor I3 multicore processor Presentation Transcript

    • AMOL T. BAREWAR.M. Tech ( 1st sem).ID no.=120151
    • 22
    • Introduction of a processor Before discussing about i3 processor, let a small introduction of processor. A processor is the logic circuitry that responds to and processes the basic instructions that drive a computer. The term processor has generally replaced the term central processing unit (CPU). The processor in a personal computer or embedded in small devices is often called a microprocessor. 3
    • Brief introduction about i3 processor The only question I have is if theres any advantage to using a Core i3 over a Core2Duo. The Core i3 is a 3.2 GHz dual core chip, and its quite a big improvement over the Core2Duo. Its a good 700 MHz faster, much faster bus with significantly faster RAM. The first Core i3 processors were launched on January 7, 2010. 4
    • the single core 5
    • Multi-core CPU chipThe cores fit on a single processor socket .Also called CMP(Chip Multi-ProcessorTask level and Tread level parallelism. 6
    • 7
    • Some features of i3Intel® Hyper-Threading Technology (Intel® HT Technology).Intel® Virtualization Technology (Intel® VT).Intel® Smart Cache.Intel Smart Memory Access.Execute Disable Bit. 8
    • Intel Hyper-Threading TechnologySingle core can run multiple thread.Simultaneous multi threading.Increase throughput and efficiency.Turbo Bust Technology.Thermal Design Power(TDP) 9
    • L1 D-Cache D-TLBL2 Cache and Control Integer Floating Point Schedulers Uop queues Rename/Alloc BTB Trace Cache uCode ROM Decoder This scenario is impossible with SMTBus BTB and I-TLB on a single core Thread 1 Thread 2 (assuming a single IMPOSSIBLE integer unit)10
    • L1 D-Cache D-TLB L1 D-Cache D-TLB Integer Floating Point Integer Floating PointL2 Cache and Control L2 Cache and Control Schedulers Schedulers Uop queues Uop queues Rename/Alloc Rename/Alloc BTB Trace Cache uCode BTB Trace Cache uCode ROM ROM Decoder DecoderBus Bus BTB and I-TLB BTB and I-TLB Thread 1 Thread 3 Thread 2 11 Thread 4
    • Speeding up the transfer of platform control between the guestoperating systems (OSs) and the virtual machine manager(VMM)/hypervisor.Enabling the VMM to uniquely assign I/O devices to guest OSsOptimizing the network for virtualization with adapter-basedacceleration 12
    • Server Virtualization Intel® VT Flex Priority Intel® VT Flex MigrationDesktop VirtualizationTypes of Hypervisor Type 1: oracle VM server for SPARC Type2:VMWare workstation , Virtual BoxIts also provide help to run 32bit O.S. on 64 bit 13
    • 14
    • Smart Cache is a level 2 or level 3 cache method for multipleexecution cores invented by Intel.It shares the cache among coresIt decrease the cache miss rate.It provide peak transfer rate of 96GB/sec . 15
    • 16
    • Improve the performance.It aim to locate data as close as possible to reduce memorylatency time.It also include Memory disambiguation. 17
    • 18
    • Malicious buffer overflow attacks pose a significant securitythreat to businesses.These attacks cost businesses precious productivity time, whichcan equal significant financial loss.It allows the processor to classify where application code can executand where it cannot in the memory.When a malicious worm attempts to insert code in the buffer,the processor disables code execution. 19
    • REFERENCEShttp://www.intel.com/content/www/us/en/processors/core/core-i3-processor.htmlhttp://www.intel.com/products/processor/corei3/specifications.htmhttp://www.intel.com/technology/xdbit/index.htmhttp://en.wikipedia.org/wiki/Hypervisorhttp://en.wikipedia.org/wiki/Memory_disambiguationhttp://www.realworldtech.com/merom/9/ 20