branch ins 8051
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branch ins 8051 branch ins 8051 Presentation Transcript

  • BRANCH INSTRUCTIONS CALL, JMP, RET
  • Branching instructions
    • Program branching instructions are used to
    • control the flow of actions in a program
    • Some instructions provide decision making capabilities and transfer control to other parts of the program.
      • e.g. conditional and unconditional branches
  • CALL  ACALL & LCALL
    • The 8051 provides 2 forms for the CALL instruction:
      • Absolute Call – ACALL
        • Uses an 11-bit address
        • The subroutine must be within the same 2K page .
      • Long Call – LCALL
        • Uses a 16-bit address
        • The subroutine can be anywhere.
      • Both forms push the 16-bit address of PC on the stack and update the stack pointer.
  • Absolute Call – ACALL addr11
    • This instruction unconditionally calls a subroutine indicated by the address
    • 2 byte instruction : The upper 3-bits of the address combine with the 5-bit opcode to form the 1 st byte and the lower 8-bits of the address form the 2 nd byte
    • Eg. ACALL LOC_SUB
    • If SP=07H initially
    • label “LOC_SUB” is at memory 0567H,
    • then executing instruction at 0230H (PC),
      • SP=09H, internal RAM locations 08H and 09H will contain 32H and 02H respectively and PC=0567H
  • LONG CALL - LCALL addr16
    • It is a Long call, the subroutine may therefore begin anywhere in the full 64 kB program memory address space
    • 3 byte instruction
    • LCALL LOC_SUB
    • Initially, SP=07H
    • label “LOC_SUB” is at memory 4100H
    • Executing the instruction at 0230H ( PC),
      • SP=09H , internal RAM locations 08H and 09H contain 33H and 02H respectively and PC=4100H
  • RETURN  RET & RETI
    • The 8051 provides 2 forms for the return instruction:
      • Return from subroutine – RET
        • Pop the return address from the stack and continue execution there.
      • Return from ISR – RETI
        • Pop the return address from the stack.
        • Restore the interrupt logic to accept additional interrupts at the same priority level as the one just processed .
        • Continue execution at the address retrieved from the stack.
        • The PSW is not automatically restored.
  • JUMP  SJMP
    • The 8051 provides four different types of unconditional jump instructions:
    • Short Jump – SJMP addr
        • Uses an 8-bit signed offset relative to the 1 st byte of the next instruction .
        • the range of destination allowed is from -128 to+127 bytes from the instruction
    • SJMP RELSRT
        • If the label RELSRT is at program memory location 0120H and the SJMP instruction is located at address 0100H ( PC) ,after executing the instruction, PC=0120H
  • JUMP  LJMP
    • Long Jump – LJMP
        • Uses a 16-bit address .
        • 3 byte instruction capable of referencing any location in the entire 64K of program memory.
    • LJMP FAR_ADR
    • If the label FAR_ADR is at program memory location 3456H
      • the LJMP instruction at location 0120H (PC)
      • After instruction, it loads the PC with 3456H
  • JUMP  AJMP
      • Absolute Jump – AJMP
        • Uses an 11-bit address .
        • 2 byte instruction
        • The 11-bit address is substituted for the lower 11-bits of the PC to calculate the 16-bit address of the target.
        • The location referenced must be within the 2K Byte
    • AJMP NEAR
        • If the label NEAR is at program memory location 0120H , the AJMP instruction at location 0234H (PC) loads the PC with 0120H
  • Indirect Jump
    • This instruction adds the 8-bit unsigned value of the ACC to the 16-bit data pointer and the resulting sum is returned to the PC
    • Neither ACC nor DPTR is altered
    • No flags are affected
    • MOV DPTR, #LOOK_TBL
    • JMP @A + DPTR
    • LOOK_TBL: AJMP LOC0
    • AJMP LOC1
    • AJMP LOC2
        • If the ACC=02H , execution jumps to LOC2
        • AJMP is a two byte instruction
  • CONDITIONAL JUMP
    • The 8051 supports different conditional jump instructions.
      • ALL conditional jump instructions use an 8-bit address.
      • Jump on Zero – JZ / JNZ
        • Jump if the A == 0 / A != 0
          • The check is done at the time of the instruction execution.
      • Jump on Carry – JC / JNC
        • Jump if the C flag is set / cleared.
  • CONDITIONAL JUMP
      • Jump on Bit – JB / JNB
        • Jump if the specified bit is set / cleared.
        • Any addressable bit can be specified.
      • Jump if the Bit is set then Clear the bit – JBC
        • Jump if the specified bit is set.
        • Then clear the bit.
  • Compare and Jump if Not Equal – CJNE
      • Compare the magnitude of the two operands and jump if they are not equal.
        • The values are considered to be unsigned.
        • The Carry flag is set / cleared appropriately.
        • CJNE A, direct, rel
        • CJNE A, #data, rel
        • CJNE Rn, #data, rel
        • CJNE @Ri, #data, rel
  • Decrement and Jump if Not Zero – DJNZ
      • Decrement the first operand by 1 and jump to the location identified by the second operand if the resulting value is not zero.
    • DJNZ 20H,LOC1
    • DJNZ 30H,LOC2
    • DJNZ 40H,LOC3
        • If internal RAM locations 20H, 30H and 40H contain the values 01H, 5FH and 16H respectively,
        • the above instruction sequence will cause a jump to the instruction at LOC2 , with the values 00H, 5EH, and 15H in the 3 RAM locations
  • NOP
    • This is the no operation instruction
    • The instruction takes one machine cycle operation time
    • Hence it is useful to time the ON/OFF bit of an output port
    • CLR P1.2
    • NOP
    • NOP
    • NOP
    • NOP
    • SETB P1.2