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Boolean algebra1
Boolean algebra1
Boolean algebra1
Boolean algebra1
Boolean algebra1
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Boolean algebra1

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  • 1. Boolean Algebra Boolean algebraIntroductionThe most obvious way to simplify Boolean expressions is to manipulate them in the same way as normalalgebraic expressions are manipulated. With regards to logic relations in digital forms, a set of rules forsymbolic manipulation is needed in order to solve for the unknowns.A set of rules formulated by the English mathematician George Boole describe certain propositions whoseoutcome would be either true or false. With regard to digital logic, these rules are used to describe circuitswhose state can be either, 1 (true) or 0 (false). In order to fully understand this, the relation betweenthe AND gate, OR gate and NOT gate operations should be appreciated. A number of rules can be derivedfrom these relations as Table 1 demonstrates. P1: X = 0 or X = 1 P2: 0 . 0 = 0 P3: 1 + 1 = 1 P4: 0 + 0 = 0 P5: 1. 1 = 1 P6: 1. 0 = 0. 1 = 0 P7: 1 + 0 = 0 + 1 = 1Table 1: Boolean PostulatesLaws of Boolean AlgebraTable 2 shows the basic Boolean laws. Note that every law has two expressions, (a) and (b). This is knownas duality. These are obtained by changing every AND(.) to OR(+), every OR(+) to AND(.) and all 1s to0s and vice-versa. It has become conventional to drop the . (AND symbol) i.e. A.B is written as AB.T1 : Commutative Law (a) A + B = B + A (b) A B = B AT2 : Associate Law (a) (A + B) + C = A + (B + C) (b) (A B) C = A (B C)T3 : Distributive Law (a) A (B + C) = A B + A C (b) A + (B C) = (A + B) (A + C)T4 : Identity Law (a) A + A = A (b) A A = AT5 : (a) (b)T6 : Redundance Law (a) A + A B = A (b) A (A + B) = AT7 : (a) 0 + A = A (b) 0 A = 0T8 : (a) 1 + A = 1 (b) 1 A = AT9 : (a) (b)T10 : (a) (b)T11 : De Morgans Theorem (a) (b)ExamplesProve T10 : (a) (1) Algebraically:K. Adisesha Page 1
  • 2. Boolean Algebra(2) Using the truth table:Using the laws given above, complicated expressions can be simplified.Logic gatesDigital systems are said to be constructed by using logic gates. These gates are the AND, OR, NOT,NAND, NOR, EXOR and EXNOR gates. The basic operations are described below with the aid of truthtables.AND gateThe AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) isused to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. ABOR gateThe OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high. Aplus (+) is used to show the OR operation.NOT gateThe NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is alsoknown as an inverter. If the input variable is A, the inverted output is known as NOT A. This is alsoshown as A, or A with a bar over the top, as shown at the outputs. The diagrams below show two waysthat the NAND logic gate can be configured to produce a NOT gate. It can also be done using NOR logicgates in the same way.NAND gateK. Adisesha Page 2
  • 3. Boolean AlgebraThis is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of allNAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on theoutput. The small circle represents inversion.NOR gateThis is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NORgates are low if any of the inputs are high.The symbol is an OR gate with a small circle on the output. The small circle represents inversion.EXOR gateThe Exclusive-OR gate is a circuit which will give a high output if either, but not both, of its two inputsare high. An encircled plus sign ( ) is used to show the EOR operation.EXNOR gateThe Exclusive-NOR gate circuit does the opposite to the EOR gate. It will give a low output if either, butnot both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. Thesmall circle represents inversion. The NAND and NOR gates are called universal functions since with either one the AND and ORfunctions and NOT can be generated.Note:A function in sum of products form can be implemented using NAND gates by replacing all ANDand OR gates by NAND gates.A function in product of sums form can be implemented using NOR gates by replacing all AND and ORgates by NOR gates.Table 1: Logic gate symbolsTable 2 is a summary truth table of the input/output combinations for the NOT gate together with allpossible input/output combinations for the other gate functions. Also note that a truth table with n inputshas 2n rows. You can compare the outputs of different gates.Table 2: Logic gates representation using the Truth tableK. Adisesha Page 3
  • 4. Boolean AlgebraKarnaugh MapsKarnaugh maps provide a systematic method to obtain simplified sum-of-products (SOPs) Booleanexpressions. This is a compact way of representing a truth table and is a technique that is used to simplifylogic expressions. It is ideally suited for four or less variables, becoming cumbersome for five or morevariables. Each square represents either a minterm or maxterm. A K-map of n variables will have 2squares. For a Boolean expression, product terms are denoted by 1s, while sum terms are denoted by 0s -but 0s are often left blank. A K-map consists of a grid of squares, each square representing one canonicalminterm combination of the variables or their inverse. The map is arranged so that squares representingminterms which differ by only one variable are adjacent both vertically and horizontally. Therefore XYZwould be adjacent to XYZ and would also adjacent to XYZ and XYZ.Minimization Technique Based on the Unifying Theorem: X + X = 1 The expression to be minimized should generally be in sum-of-product form (If necessary, the conversion process is applied to create the sum-of-product form). The function is mapped onto the K-map by marking a 1 in those squares corresponding to the terms in the expression to be simplified (The other squares may be filled with 0s). Pairs of 1s on the map which are adjacent are combined using the theorem Y(X+X) = Y where Y is any Boolean expression (If two pairs are also adjacent, then these can also be combined using the same theorem). The minimization procedure consists of recognizing those pairs and multiple pairs. o These are circled indicating reduced terms. 1 2 3 o Groups which can be circled are those which have two (2 ) 1s, four (2 ) 1s, eight (2 ) 1s, and so on. o Note that because squares on one edge of the map are considered adjacent to those on the opposite edge, group can be formed with these squares. o Groups are allowed to overlap. The objective is to cover all the 1s on the map in the fewest number of groups and to create the largest groups to do this. Once all possible groups have been formed, the corresponding terms are identified. o A group of two 1s eliminates one variable from the original minterm. o A group of four 1s eliminates two variables from the original minterm. o A group of eight 1s eliminates three variables from the original minterm, and so on. o The variables eliminated are those which are different in the original minterms of the group.2-Variable K-Mapn any K-Map, each square represents a minterm. Adjacent squares always differ by just one literal (So thatthe unifying theorem may apply: X + X = 1). For the 2-variable case (e.g.: variables X, Y), the map canbe drawn as below. Two variable map is the one which has got only two variables as inputExample- Carry and Sum of a half adderK. Adisesha Page 4
  • 5. Boolean AlgebraExample- Carry and Sum of a half adderIn this example we have the truth table as input, and we have two output functions. Generally we mayhave n output functions for m input variables. Since we have two output functions, we need to draw two k-maps (i.e. one for each function). Truth table of 1 bit adder is shown below. Draw the k-map for Carry andSum as shown below. X Y Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1K. Adisesha Page 5

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