Shift Registers

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Shift Registers

  1. 1. EET 3350 Digital Systems Design Textbook: John Wakerly Chapter 8: 8.5 Shift Registers 1
  2. 2. Definition• A register is a digital circuit with two basic functions: Data Storage and Data Movement – A shift register provides the data movement function – A shift register “shifts” its output once every clock cycle• A shift register is a group of flip-flops set up in a linear fashion with their inputs and outputs connected together in such a way that the data is shifted from one device to another when the circuit is active 2
  3. 3. Shift Register Applications• converting between • some counter serial data and applications parallel data – ring counter• temporary storage in – Johnson counter a processor – Linear Feedback Shift – scratch-pad memories Register (LFSR) counters• some arithmetic • time delay devices operations • more … – multiply, divide• communications – UART 3
  4. 4. Shift Register Characteristics• Types – Serial-in, Serial-out – Serial-in, Parallel-out – Parallel-in, Serial-out – Parallel-in, Parallel-out – Universal n-bit shift register• Direction – Left shift – Right shift – Rotate (right or left) – Bidirectional 4
  5. 5. Data Movement• The bits in a shift register can move in any of the following manners 5
  6. 6. Data Movement• Block diagrams for shift registers with various input/output options: n-bit shift n-bit shift register register n-bit shift n-bit shift register register 6
  7. 7. Serial-In Serial-Out• Data bits come in one at a time and leave one at a time n-bit shift register• One Flip-Flop for each bit to be handled• Movement can be left or right, but is usually only in a single direction in a given register• Asynchronous preset and clear inputs are used to set initial values 7
  8. 8. Serial-In Serial-Out• The logic circuit diagram below shows a generalized serial-in serial-out shift register – SR Flip-Flops are shown – Connected to behave as D Flip-Flops – Input values moved to outputs of each Flip-Flop with the clock (shift) pulse N 1 0 N-Bit Shift Register 8
  9. 9. Shift Registers• The simplest shift register is one that uses only Flip-Flops• The output of a given Flip-Flop is connected to the D input of the Flip-Flop at its right.• Each clock pulse shifts the contents of the register one bit position to the right.• The Serial input (SI) determines what goes into the leftmost Flip- Flop during the shift. The Serial output (SO) is taken from the output of the rightmost Flip-Flop. Q Q Q Q 9
  10. 10. Serial-In Serial-Out• A simple way of looking at the serial shifting operation, with a focus on 1 the data bits, is illustrated at right 2• The 4-bit data word “1011” is to be shifted into 3 a 4-bit shift register• One shift per clock pulse 4• Data is shown entering at left and shifting right 5 10
  11. 11. Serial-In Serial-Out• The diagram at right shows the 4-bit sequence “1010” being loaded into the 4-bit serial-in serial- out shift register• Each bit moves one position to the right each time the clock’s leading edge occurs• Four clock pulses loads the register 11
  12. 12. Serial-In Serial-Out• This diagram shows the 4-bit sequence “1010” as it is unloaded from the 4- bit serial-in serial-out shift register• Each bit moves one position to the right each time the clock’s leading edge occurs• Four clock pulses unloads the register 12
  13. 13. Serial-In Serial-Out• Serial-in, serial-out shift registers are often used for data communications – such as RS-232 – modem transmission and reception – Ethernet links – SONET – etc. 13
  14. 14. Serial-to-Parallel Conversion• We often need to convert from serial to parallel n-bit shift register – e.g., after receiving a series transmission• The diagrams at the right illustrate a 4-bit serial-in parallel-out shift register• Note that we could also use the Q of the right-most Flip- Flop as a serial-out output 14
  15. 15. Serial-to-Parallel Conversion• We would use a serial-in parallel-out shift register of arbitrary length N to convert an N-bit word from serial to parallel• It would require N clock pulses to LOAD and one clock pulse to UNLOAD 15
  16. 16. Serial-to-Parallel Conversion• These two shift registers are used to convert serial data to parallel data• The upper shift register would “grab” the data once it was shifted into the lower register 16
  17. 17. Parallel-to-Serial Conversion• We use a Parallel-in Serial-out Shift Register n-bit shift register• The DATA is applied in parallel form to the parallel input pins PA to PD of the register• It is then read out sequentially from the register one bit at a time from PA to PD on each clock cycle in a serial format• One clock pulse to load• Four pulses to unload 17
  18. 18. Parallel-to-Serial Conversion • Logic circuit for a parallel-in, serial-out shift register 0 1 0 1 0 1Mux-like 18
  19. 19. Parallel-In Parallel-Out• Parallel-in Parallel-out Shift Registers can serve as a temporary storage device or as a time delay device• The DATA is presented in a parallel format to the parallel input pins PA to PD and then shifted to the corresponding output pins QA to QD when the registers are clocked• One clock pulse to load• One pulse to unload 19
  20. 20. Universal Shift Register • Universal shift register • Can do any combination of parallel and serial n-bit shift register input/output operations • Requires additional inputs to specify desired function • Uses a Mux-like input gatingL/S L/S A 0 0 F A B 1 B 1 20
  21. 21. Universal Shift Register• Parallel-in, parallel-out shift register 0 1 0 1 0 1Mux-like 21
  22. 22. Universal Shift Register• Parallel shift register (can serve as converting parallel-in to serial-out shifter): 22
  23. 23. MSI Shift Registers• 74LS164 is an 8-Bit Serial- In Parallel-Out Shift Register• Typical Shift Frequency of 35 MHz• Asynchronous Master Reset• Gated Serial Data Input• Fully Synchronous Data Transfers 23
  24. 24. MSI Shift Registers• 74LS164 logic diagram A LOW level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs LOW. 24
  25. 25. MSI Shift Registers• 74LS164 8-Bit Serial-In Parallel-Out Shift Register 25
  26. 26. MSI Shift Registers• The 74LS164 is an edge- triggered 8-bit shift register with serial data entry and an output from each of the eight stages.• Data is entered serially through one of two inputs (A or B); – either of these inputs can be used as an active HIGH Enable for data entry through the other input – an unused input must be tied HIGH, or both inputs connected together 26
  27. 27. MSI Shift Registers• Each LOW-to-HIGH transition on the Clock (CP) input shifts data one place to the right• This also outputs at Q0 the logical AND of the two data inputs (A•B) that existed before the rising clock edge. 27
  28. 28. MSI Shift Registers 28
  29. 29. MSI Shift Registers• 74LS166 is an 8-Bit Shift Register• Parallel-in or serial-in – shift/load input establishes the parallel-in or serial-in mode• Serial-out• Synchronous Load – Serial data flow is inhibited during parallel loading• Direct Overriding Clear 29
  30. 30. MSI Shift Registers• 74LS166 is an 8-Bit Shift Register 30
  31. 31. MSI Shift Registers• 74LS166 8-Bit Shift Register is a parallel-in or serial-in, serial-out shift register 31
  32. 32. MSI Shift Registers• 74LS166 is an 8-Bit Shift Register 32
  33. 33. MSI Shift Registers• 74LS166 is an 8-Bit Shift Register 33

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