Gigabit LVDS Signalling on a PCBassisted by Simulation andS-Parameter ModellingJohn Berrie                                ...
Topics• Low Voltage Differential Signalling (LVDS)   – Why LVDS is so popular   – How LVDS works   – Pushing the envelope•...
Why LVDS is so Popular•   Common-mode noise rejection•   Low voltage•   Low power•   Low noise emissions and susceptibilit...
Current-Mode Drivers3.5mA                        100Ω                               © Zuken
Simplex          RDIFF                  © Zuken
Dual Simplex                           Rt               PCI Express Lane                 Rt                               ...
PCI Express Features• Introduced by Intel in 2004• High-speed serial bus replacement for PCI, PCI-X, AGP   – Software-comp...
Skew Matching in PCI Express• Most critical   – Within each differential pair      ‒ Align within a unit interval (one clo...
HyperTransport Features•   Dual simplex point-to-point•   200MHz to 3.2GHz•   32-bit full-speed up to 51.2GB/s•   Packet-b...
Important PCB Routing Considerations forHyperTransport• Data and commands are combined and transmitted in packets• Clock a...
HyperTransport 3.1 Signal Groups in oneLink• All differential pairs• One CLK line per <=8  CAD lines                      ...
Hardware Compensation• Pre-emphasis   – Boost relative high frequency content (considering frequency domain)      ‒ Higher...
Differential Pair Essentials• Symmetry is key                               Signal Vias and Connector       Series AC     ...
Differential Pair Essentials• Avoid significant en-route discontinuities and imbalance   – Simulate to check consequences ...
Uniformity = Predictability•   Design to avoid subtle    glitch culprits     –   Environmental factors     –   Undetected ...
Desirable Field Lines in Differential Pairs                                              © Zuken
Propagation Modes                    © Zuken
S-Parameters• Useful for modelling high-speed passive components such as  filters and connectors• Black box modelling tech...
S-Parameters• Scattering of wave arriving at Port 1 (reverse for arrival at Port 2)               Zo                      ...
S-Parameter Model of Transmission Line                                                b2       V2       0.293 135V0   50Ω ...
Touchstone® File Format for S-Parameters        !2-Port S-parameters for 100Ω lossless transmission line with two        f...
Passive Component Modelling• S-Parameter Model                  • Passive Network Model   – Black box model so no         ...
Differential Channel with Common-ModeFilter: S-Parameter or Obfuscated PassiveNetwork Model                               ...
Simulation with Model Choices:S-Parameter or Obfuscated PassiveNetwork Model                                IBIS buffer mo...
Combined-Function Passive Devices                                    © Zuken
Conclusion• Point-to-point differential signalling is common and increasingly  standardised• Ultra-fast data with low powe...
The Partner for Success27                               © Zuken
Upcoming SlideShare
Loading in …5
×

Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Parameter Modeling

1,337 views
1,073 views

Published on

Presentation covers:
Low Voltage Differential Signalling (LVDS)
- Why LVDS is so popular
- How LVDS works
- Pushing the envelope

Essential PCB Routing Considerations
- Designing for low-cost manufacture
- Limitations of hardware compensation
- Benefits of routing tuning
- Propagation modes

Basics of S-Parameters
- Time domain/frequency domain conflicts in simulation
- Transforming frequency-domain models for time-domain simulation

Simulation
- When simulation is essential
- Putting it together

Published in: Technology, Design
0 Comments
0 Likes
Statistics
Notes
  • Be the first to comment

  • Be the first to like this

No Downloads
Views
Total views
1,337
On SlideShare
0
From Embeds
0
Number of Embeds
13
Actions
Shares
0
Downloads
35
Comments
0
Likes
0
Embeds 0
No embeds

No notes for slide

Zuken - Gigabit LVDS Signaling on a PCB assisted by Simulation and S-Parameter Modeling

  1. 1. Gigabit LVDS Signalling on a PCBassisted by Simulation andS-Parameter ModellingJohn Berrie © Zuken
  2. 2. Topics• Low Voltage Differential Signalling (LVDS) – Why LVDS is so popular – How LVDS works – Pushing the envelope• Essential PCB Routing Considerations – Designing for low-cost manufacture ‒ Limitations of hardware compensation ‒ Benefits of routing tuning – Propagation modes• Basics of S-Parameters – Time domain/frequency domain conflicts in simulation – Transforming frequency-domain models for time-domain simulation• Simulation – When simulation is essential – Putting it together © Zuken
  3. 3. Why LVDS is so Popular• Common-mode noise rejection• Low voltage• Low power• Low noise emissions and susceptibility• Compatible with gigabit speeds• High availability of standard parts – PCI Express – FPGA – HyperTransport © Zuken
  4. 4. Current-Mode Drivers3.5mA 100Ω © Zuken
  5. 5. Simplex RDIFF © Zuken
  6. 6. Dual Simplex Rt PCI Express Lane Rt © Zuken
  7. 7. PCI Express Features• Introduced by Intel in 2004• High-speed serial bus replacement for PCI, PCI-X, AGP – Software-compatible with PCI• Point-to-point differential, dual simplex• One dual simplex (two differential pairs) equal one lane• Capacity per lane – Version 1.x, 1.25GHz, 250MB/s – Version 2.0, 2.5GHz, 500MB/s – Version 3.0, 4GHz, 1GB/s – Largest common lane count is 16 per bus• Data transmitted in packets – 8B/10B encoding balances ones and zeros – Clock embedded within data ‒ Major implications for PCB routing © Zuken
  8. 8. Skew Matching in PCI Express• Most critical – Within each differential pair ‒ Align within a unit interval (one clock period)• And then ... – Within each 2-differential-pair dual simplex lane ‒ Desirable to make bidirectional operating speed more consistent• And then ... – From lane to lane ‒ Depends on minimum packet size ‒ Align within (bits in packet) unit intervals ‒ e.g. 128-bit packet means align within 128 unit intervals © Zuken
  9. 9. HyperTransport Features• Dual simplex point-to-point• 200MHz to 3.2GHz• 32-bit full-speed up to 51.2GB/s• Packet-based• Separate clock and data• Point-to-point dual simplex routing with Tunnel devices to create daisy chains, stars and other topologies © Zuken
  10. 10. Important PCB Routing Considerations forHyperTransport• Data and commands are combined and transmitted in packets• Clock and control are separate from data – Clock to data skew constraints are required• 2, 4, 8, 16 or 32 bit data path• Designed to work on low-cost FR-4, including 4-layer boards• On-die bridge termination• Maximum route length up to around 0.75 metres, depending on layer stack © Zuken
  11. 11. HyperTransport 3.1 Signal Groups in oneLink• All differential pairs• One CLK line per <=8 CAD lines CLK=Clock [m:0]• One CTL line per <=8 CTL=Control[n:0] CAD lines (Gen3)• Skew constraints CAD=Command/Addr/Data[p:0] between CAD, CTL and CLK CLK= Clock [m:0] CTL=Control[n:0] Low-speed signals PWROK CAD=Command/Addr/Data[p:0] and RESET# omitted from this diagram © Zuken
  12. 12. Hardware Compensation• Pre-emphasis – Boost relative high frequency content (considering frequency domain) ‒ Higher-frequency content related to rise time and amplitude – Stronger state change (considering time domain) – Compensates for Inter-Symbol Interference (ISI) during rapid state changes• Timing – Simplifying required route topology• Impedance – Adapt to detected PCB electrical characteristics (characteristic impedance) © Zuken
  13. 13. Differential Pair Essentials• Symmetry is key Signal Vias and Connector Series AC Ground Stitching Pads (driven Coupling Vias Component end) Capacitors Pads (receiving end) © Zuken
  14. 14. Differential Pair Essentials• Avoid significant en-route discontinuities and imbalance – Simulate to check consequences of small discontinuities © Zuken
  15. 15. Uniformity = Predictability• Design to avoid subtle glitch culprits – Environmental factors – Undetected manufacturing tolerance violations• Design from the front end a b – a Tune to exceed b performance a ‒ Improves re-usability • Keep coupling uniform – Predictable performance from the start – Avoids simulator stress – Electrically-equivalent PCB layers – Uniform differential spacing – Uniform pair-to-pair spacing and parallelism © Zuken
  16. 16. Desirable Field Lines in Differential Pairs © Zuken
  17. 17. Propagation Modes © Zuken
  18. 18. S-Parameters• Useful for modelling high-speed passive components such as filters and connectors• Black box modelling technique – Can be derived from hardware with no need to understand internal behaviour• Unlimited in frequency• Each entry relates to a single frequency – Large set of entries needed to cover component frequencies of a digital signal• Each entry describes how a wave of a single frequency arriving at a single port is transformed in terms of relative amplitude and phase as it is scattered to the other ports © Zuken
  19. 19. S-Parameters• Scattering of wave arriving at Port 1 (reverse for arrival at Port 2) Zo Zo Port 1 Port 2 a1 b1 b2 =S11a1 =S21a1• Scattering matrix for wave arriving at Port 1 or Port 2 © Zuken
  20. 20. S-Parameter Model of Transmission Line b2 V2 0.293 135V0 50Ω V1 100Ω V2 S 21 S 12 a1 2 V0 2 0.707 0 0.828 135 0.585 j 0.585 b1 V1 0.467 S 11 S 22 2 1 2 1 0 0.321 0 0.321 j 0.000 200mm a1 VO 0.707 50ΩV0=1V peak=0.707V RMSV1=0.66V peak=0.467V RMSV2=0.414V peak=0.293VRMS,135 phase shift withrespect to V0 © Zuken
  21. 21. Touchstone® File Format for S-Parameters !2-Port S-parameters for 100Ω lossless transmission line with two frequency points in Magnitude/Angle formatFrequency Units Parameters Type Magnitude/Angle Normalize to 50Ω Source/Load # MHz S MA R 50 200.000 0.321 0.000 0.828 238.000 0.828 135.000 0.321 0.000 250.000 0.321 0.000 0.828 135.000 0.828 135.000 0.321 0.000 Frequency S11 S21 S12 S22 Alternative formats are DB (dB-angle) and RI (real-imaginary) © Zuken
  22. 22. Passive Component Modelling• S-Parameter Model • Passive Network Model – Black box model so no – Extrapolates and interpolates assumptions automatically – Valid only under tested – May lose validity at higher conditions frequency – Need to cover entire expected – Only models what is included frequency range – Frequency or time domain – Frequency domain © Zuken
  23. 23. Differential Channel with Common-ModeFilter: S-Parameter or Obfuscated PassiveNetwork Model © Zuken
  24. 24. Simulation with Model Choices:S-Parameter or Obfuscated PassiveNetwork Model IBIS buffer model + S-Parameter driver model simulation HSPICE transistor- level Model + obfuscated passive model simulation © Zuken
  25. 25. Combined-Function Passive Devices © Zuken
  26. 26. Conclusion• Point-to-point differential signalling is common and increasingly standardised• Ultra-fast data with low power being used whether needed or not – Compare DDR2/DDR3 memory• Cheapness of manufacture has been considered – Adaptive signalling techniques – Simplified topology – Tolerance of PCB electrical characteristic variations• But… – For high-volume/cost-reduced, non-standard or safety-critical designs, simulation is still essential ‒ And its still advisable in all cases, even when following design rules © Zuken
  27. 27. The Partner for Success27 © Zuken

×