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SPICE MODEL of uPC4558C in SPICE PARK
1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: uPC4558C
MANUFACTURER: NEC ELECTRONICS
REMARK TYPE: (OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
2. Spice Model
U9
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
UPC4558
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
3. Output Voltage Swing, +Vout and –Vout
Evaluation circuit
Rload
2k Vout U9
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
V1 +IN1 -IN2
0Vdc 4 5
VEE +IN2
V+
UPC4558
Rload2
V-
2k 15Vdc
-15Vdc
0 0
The output voltage change of Opamp(open loop) when input DC voltage
(Vin -Vi) is changed with the evaluation circuit is simulated
Simulation result
These simulation results are compared with +Vout
Output Voltage Swing Data sheet Simulation %Error
+Vout(V) +13 +13.021 0.161
-Vout(V) -13 -13.021 0.161
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
4. Input Offset Voltage
Evaluation circuit
Rload
10k Vout U5
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vin Vi V+
UPC4558
VOFF = 0 VOFF = 0 Rload2
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 10k 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0 0
Simulation result
Measurement Simulation Error
Vos 6 mV 6.0195 mV 0.325 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
5. Slew Rate, +SR, -SR
Evaluation circuit
Rload
2k Vout U9
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
V1 = 0 Vi
V2 = 14 4 5
TD = 0 VEE +IN2
TR = 10n Vin V+
UPC4558
TF = 10n VOFF = 0 Rload2
PW = 5u VAMPL = 0 V-
PER = 500u FREQ = 0 2k 15Vdc
V2AC = 0
-6.0195m DC = 0 -15Vdc
0 0
The output voltage change versus time (slope) of op-amp when input electric
step voltage.
Simulation result
Output voltage change 1V in 1 us (If no good can change C2 of Spice Model
Editor)
Data sheet Simulation %Error
Slew Rate(v/us)
1 0.973 2.7
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
6. Input current Ib, Ibos
Evaluation circuit
Rload
2k Vout U9
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vin Vi V+
UPC4558
VOFF = -6.0195m VOFF = 0 Rload2
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 2k 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0 0
The input offset current when supply voltage to op-amp
Simulation result
Data sheet Simulation %Error
Ib(nA) 60 59.8 0.333
Ibos(nA) 5 5.02 0.4
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
7. Open Loop Voltage Gain vs. Frequency, Av-dc, f-0dB
Evaluation circuit
Vout U10
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vin Vi V+
UPC4558
VOFF = 0 VOFF = 0
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 15Vdc
AC = 1m AC = 0
DC = -6.0195m DC = 0 -15Vdc
0
The open loop voltage gain of op-amp when supply AC input voltage 3MHz
frequecy
Simulation result
Data sheet Simulation %Error
f-0dB(MHz) 3 2.728 9.06
Av-dc 100000 99655 0.345
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
8. Output Short Circuit Current - Ios
Evaluation circuit
1nRload Vout U9
1 8
OUT1 VCC
2 7
V6 -IN1 OUT2
3 6
+IN1 -IN2 Rload2
0 4 5
VEE +IN2 1n
Vin Vi V+
UPC4558
VOFF = -6.0195m VOFF = 0
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 V7 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0
0 0
Simulation result
Short Circuit current
Data sheet Simulation %Error
Short Circuit Current
50mA 50.576mA 1.152
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
9. Common-Mode Rejection Voltage gain
Evaluation circuit
Vout U9
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
DC = 0 DC = 0 4 5
AC = 0 AC = 0 VEE +IN2
FREQ = 0 FREQ = 0 V+
UPC4558
VAMPL = 0 VAMPL = 0
VOFF = 0 VOFF = 0 V-
Vin Vi 15Vdc
-15Vdc
V
VOFF = 0
VAMPL = 0.5
FREQ = 1
AC = 0
DC = -6.0195m
0
Simulation result
Common mode gain=1/0.3162
Common Mode Reject Ratio=99655/3.162=31516
Data sheet Simulation %Error
CMRR
31622 31516 0.335
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004