SPICE MODEL of uPC4091C in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: uPC4091C
MANUFACTURER: NEC ELECTRONICS
REMARK TYPE: (OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. Spice Model
U1
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
4 5
V- OFFSET NULL
UPC4091
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Output Voltage Swing, +Vout and –Vout
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+ V6
Vin
VOFF = 0 3 6
IN OUT Vout
VAMPL = 0
FREQ = 0 4 5 0 Rload
AC = 0 V- OFFSET NULL
DC = 0 2k
Vi UPC4091
VOFF = 0 V-
0
VAMPL = 0
FREQ = 0 0
AC = 0 -15Vdc
DC = 0
0 0
The output voltage change of Opamp(open loop) when input DC voltage
(Vin -Vi) is changed with the evaluation circuit is simulated
Simulation result
These simulation results are compared with +Vout
Output Voltage Swing Data sheet Simulation %Error
+Vout(V) +13.5 +13.499 0.007407407
-Vout(V) -12.8 -12.799 0.0078125
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Input Offset Voltage
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+
Vin
VOFF = 0 3 6
IN OUT Vout
VAMPL = 0
FREQ = 0 4 5
AC = 0 V- OFFSET NULL
DC = 0 Vi
V- UPC4091
0 VOFF = 0
VAMPL = 0
FREQ = 0
AC = 0 -15Vdc
DC = 0
0 0
Simulation result
Measurement Simulation Error
Vos 2.5 mV 2.498896 mV 1.732 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Slew Rate, +SR, -SR
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+
V1 = -14 V1
V2 = 14 3 6
IN OUT Vout
TD = 0
TR = 10n 4 5 Rload
TF = 10n V- OFFSET NULL
PW = 5u 2k
V- UPC4091
PER = 500u
0
V2 -15Vdc 0
-2.498896m
0
0
The output voltage change versus time (slope) of op-amp when input electric
step voltage.
Simulation result
Output voltage change 15V in 1 us (If no good can change C2 of Spice Model
Editor)
Data sheet Simulation %Error
Slew Rate(v/us)
15 15.072 0.48
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

6. Input current Ib, Ibos
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+
Vin
VOFF = -2.498896m 3 6
IN OUT Vout
VAMPL = 0
FREQ = 0 4 5 Rload
AC = 0 V- OFFSET NULL
DC = 0 2k
Vi UPC4091
VOFF = 0 V-
0
VAMPL = 0
FREQ = 0
AC = 0 -15Vdc 0
DC = 0
0 0
The input offset current when supply voltage to op-amp
Simulation result
I(Vin) =37.782pA, I(Vi) =62.777pA :Ib =( I(Vin)+ I(Vi))/2=,Ibos =24.988p
Data sheet Simulation %Error
Ib(pA) 50 50.279 0.558
Ibos(pA) 25 24.988 0.048
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

7. Open Loop Voltage Gain vs. Frequency , Av-dc, f-0dB
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+
Vin
VOFF = 0 3 6
IN OUT Vout
VAMPL = 0
FREQ = 0 4 5 Rload
AC = 1m V- OFFSET NULL
DC = -2.4988967m 2k
Vi UPC4091
VOFF = 0 V-
0
VAMPL = 0
FREQ = 0
AC = 0 -15Vdc 0
DC = 0
0 0
The open loop voltage gain of op-amp when supply AC input voltage 4MHz
frequecy
Simulation result
f-0dB ~ 4.385MHz, Av-dc ~ 106.21dB
Data sheet Simulation %Error
f-0dB(MHz) 4 4.385 9.625
Av-dc 200000 204408 2.204
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

8. Output Short Circuit Current - Ios
Evaluation circuit
V+
15Vdc
U5
1 8 0
OFFSET NULL NC
2 7
II V+ V1
Vin
VOFF = -2.498896m 3 6
IN OUT Vout
VAMPL = 0
FREQ = 0 4 5 0Vdc Rload
AC = 0 V- OFFSET NULL
DC = 0 1n
Vi UPC4091
VOFF = 0 V-
0
VAMPL = 0
FREQ = 0
AC = 0 -15Vdc 0
DC = 0
0 0
Simulation result
Short Circuit current
Data sheet Simulation %Error
Short Circuit Current
25mA 25.392mA 1.568
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

9. Common-Mode Rejection Voltage gain
Evaluation circuit
V+
15Vdc
U5
1 8 0
Vin OFFSET NULL NC
2 7
II V+
Vof f 0Vdc 3 6
IN OUT Vout
-2.498896m
4 5
V- OFFSET NULL
Vi
V- UPC4091
V1 0Vdc
VOFF = 0 -15Vdc
VAMPL = 0.5
FREQ = 1 0
AC = 0
DC = 0
0
Simulation result
Common mode gain=2.071/1
Common Mode Reject Ratio=204408/2.072=98652
Data sheet Simulation %Error
CMRR
100000 98652 1.348
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004