SPICE MODEL of uPC4061C in SPICE PARK

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SPICE MODEL of uPC4061C in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

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SPICE MODEL of uPC4061C in SPICE PARK

  1. 1. Device Modeling Report COMPONENTS: OPERATIONAL AMPLIFIER PART NUMBER: uPC4061C MANUFACTURER: NEC ELECTRONICS REMARK TYPE: (OPAMP) Bee Technologies Inc.All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  2. 2. Spice Model U6 5 4 OFFSET NULL V- 6 3 OUT IN 7 2 V+ II 8 1 NC OFFSET NULL uPC4061 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  3. 3. Output Voltage Swing, +Vout and –VoutEvaluation circuit V+ 15Vdc U6 1 8 0 OFFSET NULL NC 2 7 II V+ Vin VOFF = 0 3 6 VAMPL = 0 IN OUT Vout FREQ = 0 4 5 Rload AC = 0 V- OFFSET NULL DC = 0 uPC4061 2k Vi 0 VOFF = 0 VAMPL = 0 FREQ = 0 V- AC = 0 0 DC = 0 0 -15Vdc 0Simulation resultThese simulation results are compared with +Vout Output Voltage Swing Data sheet Simulation %Error +Vout(V) +14 +13.972 0.2 -Vout(V) -13.6 -13.572 0.205882353 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  4. 4. Input Offset VoltageEvaluation circuit V+ 15Vdc U6 1 8 0 OFFSET NULL NC 2 7 II V+ Vin VOFF = 0 3 6 VAMPL = 0 IN OUT Vout FREQ = 0 4 5 AC = 0 V- OFFSET NULL DC = 0 Vi uPC4061 0 VOFF = 0 VAMPL = 0 FREQ = 0 V- AC = 0 DC = 0 0 -15Vdc 0Simulation result Measurement Simulation Error Vos 10 mV 9.985 mV 0.15 % All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  5. 5. Slew Rate, +SR, -SREvaluation circuit V+ 15Vdc U6 1 8 0 OFFSET NULL NC 2 7 II V+ V1 = 0 V1 V2 = 14 3 6 TD = 0 IN OUT Vout TR = 10n 4 5 Rload TF = 10n V- OFFSET NULL PW = 5u uPC4061 2K PER = 500u 0 V- V2 0 -9.985m -15Vdc 0 0The output voltage change versus time (slope) of op-amp when input electricstep voltage.Simulation resultOutput voltage change 15V in 1 us (If no good can change C2 of Spice ModelEditor) Data sheet Simulation %ErrorSlew Rate(v/us) 15 15.072 0.48 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  6. 6. Input current Ib, IbosEvaluation circuit V+ 15Vdc U6 1 8 0 Vin OFFSET NULL NC 2 7 II V+ 0Vdc Vii 3 6 IN OUT Vout 0Vdc 4 5 Rload V- OFFSET NULL uPC4061 2k V- 0 0 0 -15Vdc 0The input offset current when supply voltage to op-ampSimulation resultI(Vin) =73.91pA, I(Vi) =122.92pA :Ib =( I(Vin)+ I(Vi))/2=,Ibos =49.01p Data sheet Simulation %Error Ib(pA) 100 98.415 1.585 Ibos(pA) 50 49.01 1.98 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  7. 7. Open Loop Voltage Gain vs. Frequency , Av-dc, f-0dBEvaluation circuit V+ 15Vdc U6 1 8 0 OFFSET NULL NC 2 7 II V+ Vin VOFF = 0 3 6 VAMPL = 0 IN OUT Vout FREQ = 0 4 5 Rload AC = 1m V- OFFSET NULL DC = -9.985m uPC4061 2k Vi 0 VOFF = 0 VAMPL = 0 FREQ = 0 V- AC = 0 0 DC = 0 0 -15Vdc 0The open loop voltage gain of op-amp when supply AC input voltage 1MHzfrequecySimulation result Data sheet Simulation %Error f-0dB(MHz) 1 1.035 3.5 Av-dc 9000 9555 6.166666667 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  8. 8. Output Short Circuit Current - IosEvaluation circuit V+ 15Vdc U6 1 8 0 OFFSET NULL NC 2 7 II V+ V6 Vin VOFF = -9.985m 3 6 VAMPL = 0 IN OUT Vout FREQ = 0 4 5 0 Rload AC = 0 V- OFFSET NULL DC = 0 uPC4061 1n Vi 0 VOFF = 0 VAMPL = 0 FREQ = 0 V- AC = 0 0 DC = 0 0 -15Vdc 0Simulation result Short Circuit current Data sheet Simulation %ErrorShort Circuit Current 13mA 13.467mA 3.592 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  9. 9. Common-Mode Rejection Voltage gainEvaluation circuit V+ 15Vdc U6 1 8 0 Vin OFFSET NULL NC 2 7 II V+ Vof f 0Vdc 3 6 IN OUT Vout -9.985m 4 5 V- OFFSET NULL Vi uPC4061 0Vdc V- V1 VOFF = 0 VAMPL = 0.5 -15Vdc FREQ = 1 AC = 0 0 DC = 0 0Simulation resultCommon mode gain=0.301/1Common Mode Reject Ratio=9555/0.301=31744 Data sheet Simulation %Error CMRR 31623 31744 0.382632894 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

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