Convergence Guide for PSpice
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Convergence Guide for PSpice

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Convergence Guide for PSpice

Convergence Guide for PSpice

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  • 1. PSpice Simulation Convergence Guide All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 1 Bee Technologies http://www.bee-tech.info/ 27MAR2014 Tsuyoshi Horigome
  • 2. PSpice Simulation Convergence Guide • .OPTION setting guide • PSpice Standard Default • Simulation Convergence  Quick Fix • Maximum Step Size • SKIPBP All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 2
  • 3. .OPTION setting guide (1/2) .OPTIONS Default Suggestion Explanation RELTOL 0.001 0.01 • Increase simulation speed by 10 to 50% VNTOL 1u 1m • Aid convergence but reduce the voltage accuracy ABSTOL 1p 1n, 1u or Increase to 10u • Aid convergence but reduce the current accuracy • Should be 8 order of magnitude below the level of the maximum current (ABSTOL < I[MAX]/108) CHGTOL 0.01p 0.01u • If capacitor are in order of Farad, increase CHGTOL by six order of magnitude GMIN 1E-12 1E-9 ~ 1E-8 • Please note that Vswith model parameter ROFF is limited by 1/GMIN All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 3
  • 4. .OPTION setting guide (2/2) .OPTIONS Default Suggestion Explanation ITL1 150 200, 400, 500 • This increases the number of DC iterations that PSpice will perform before it gives up. • In the complex circuit, further increases in ITL1 (e.g. 1000) won’t aid convergence. ITL2 20 50, 100, 200 • This increases the number of DC iterations that PSpice will attempt before it gives up. ITL4 10 40, 100, or 500 • This increases the number of transient iterations that PSpice will attempt at each time point before it gives up. • Values greater than 100 won’t usually bring convergence All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 4
  • 5. PSpice Standard Default All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 5 .OPTIONS  RELTOL=0.001  VNTOL=1.0u  ABSTOL=1.0p  CHGTOL=0.01p  GMIN=1.0E-12  ITL1=150  ITL2=20  ITL4=10
  • 6. Simulation Convergence  Quick Fix All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 6 .OPTIONS  RELTOL=0.01  VNTOL=1.0m  ABSTOL=1.0n  CHGTOL=0.01u  GMIN=1.0E-12  ITL1=500  ITL2=200  ITL4=100
  • 7. Maximum Step Size All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 7 • To increase (or decrease in some cases) the Maximum step size might help the simulation to complete – e.g. Increase the Maximum step size from 10n to 100n can cause the simulation to complete.
  • 8. SKIPBP Skipping the bias point Check the SKIPBP option to skip the bias point calculation for the transient analysis Please note that this setting should be used as a last resort if there is trouble getting the transient analysis to start because the DC operating point can’t be calculated. All Rights Reserved Copyright (C) Bee Technologies Corporation 2014 8