Moore’s law In 1965 Gordon Moore predicted that chip capacity would double every 18-24 months. G. Moore, ”Cramming more components onto integrated circuits”, Electronics, Vol. 38, Nb. 8 (1965) Itanium 2 (9 MB core) Itanium 2 Pentium 4 Pentium III Pentium II Pentium 486 386 286 8086 8080 8008 4004 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 1960 1970 1980 1990 2000 2010 year transistors Over 40 years his prediction has been true.
Simultaneous increasing of performance while decreasing of price has fuelled IC industry over last 30 years.
In 1978 a commercial flight between New York and Paris cost ~ 900$ and took seven hours. If Moore’s law would be applied to the aircraft industry this flight would now cost one cent and take less than one second.
Building blocks Range: 100 - 1000 Machine Functional Clusters Range: 20-40 12 NC’s Range: 50.000 – 100.000 System Breakdown based on FC’s Subsystems Range: upto 50?
From platforms to products Product I.A Product I.B Platform I + = = Selectable Building Blocks Products can be realized by changing only selected building blocks within a given platform Product II.A Product II.B Platform II Platform III + = = Over time building blocks evolve leading to ever increasing platform capabilities.
PGP:EDEV Participation System : Subsystem: Module : Specification Design Test & Int. Specification Design Test & Int. Specification Design Test E-Architect : E-Designer : E-Integrator : PRS, SPS SDS TPS, TAR, ITP TPS, TAR, ITP EDS, HSI EPS TPS, TAR EDS EPS Feasibility System Definition Subsystem Definiton Integration Validation Realization classic V-approach squeezes component level development Early start of development at all levels to meet time to market Early delivery of 1st unit for system integration, parallel maturing for volume deliveries