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# Code generator

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• Familiarity with the target machine and its instruction set is a prerequisite for designing a good code generator. Unfortunately, in a general discussion of code generation it is not possible to describe any target machine in sufficient detail to generate good code for a complete language on that machine. lec08-memoryorg September 3, 2012
• • Load operations: The instruction LD dst, addr loads the value in location addr into location dst. This instruction denotes the assignment dst = addr. The most common form of this instruction is LD 1&apos;, x which loads the value in location x into register r. An instruction of the form LD 1&apos;1 , 1&apos;2 is a register-to-register copy in which the contents of register 1&apos;2 are copied into register 1&apos;1 . • Store operations: The instruction S1 x, r stores the value in register r into the location x. This instruction denotes the assignment x = r . • Computation operations of the form O P dst, srCl , srC2 , where O P is a operator like ADD or SUB, and dst, srCl , and srC2 are locations, not necessarily distinct. The effect of this machine instruction is to apply the operation represented by OP to the values in locations srCI and srC2 , and place the result of this operation in location dst. For example, SUB rl , r2 , 1&apos;3 computes ri = r2 - 1&apos;3 . Any value formerly stored in rl is lost, but if 1&apos;1 is r2 or 1&apos;3 , the old value is read first. Unary operators that take only one operand do not have a src2 . Unconditional jumps: The instruction BR L causes control to branch to the machine instruction with label L. (BR stands for branch.) • Conditional jumps of the form Bcond r, L, where r is a register, L is a label, and cond stands for any of the common tests on values in the register r. For example, BLT2 r, L causes a jump to label L if the value in register r is less than zero, and allows control to pass to the next machine instruction if not. lec08-memoryorg September 3, 2012
• #here 表示当前指令的指针 20 是三个常量 + 两个指令 共 5 个 word 因此， here+20 是 BR 指令后的指令 The 8T instruction saves the return address at the beginning of the activation record for .callee, and the BR transfers control to the target code for the called procedure callee. The attribute before callee. staticArea is a constant that gives the address of the beginning of the activation record for callee, and the attribute callee. codeA rea is a constant referring to the address of the first instruction of the called procedure callee in the Code area of the run-time memory. The operand #here + 20 in the 8T instruction is the literal return address; it is the address of the instruction following the BR instruction. We assume that #here is the address of the current instruction and that the three constants plus the two instructions in the calling sequence have a length of 5 words or 20 bytes. lec08-memoryorg September 3, 2012
• The basic blocks are maximal sequences of consecutive three-address instructions with the properties that (a) The flow of control can only enter the basic block through the first instruction in the block. That is, there are no jumps into the middle of the block. (b) Control will leave the block without halting or branching, except possibly at the last instruction in the block. lec08-memoryorg September 3, 2012
• lec08-memoryorg September 3, 2012
• The leaders: 1, 2, 3, 10, 12, and 13. lec08-memoryorg September 3, 2012
• Knowing when the value of a variable will be used next is essential for generating good code. If the value of a variable that is currently in a register will never be referenced subsequently, then that register can be assigned to another variable. lec08-memoryorg September 3, 2012
• Here we have used + as a symbol representing any operator. If the three-address statement i is of the form x = + Y or x = y, the steps are the same as above, ignoring z. Note that the order of steps (2) and (3) may not be interchanged because x may be y or z. 第一步每当开始对一个基本块进行处理时，把块中各变量在符号表相应登记项的待用信息栏置为“无待用”，且依各变量在基本块的出口活跃与否，将相应的活跃信息栏置为“活跃”或“非活跃”。 第二步从基本块的出口开始，反向扫视基本块中的各四元式，设当前正扫视的四元式为 (i)A∶=B OP C ， 　　 对 (i) 依次作如下的处理： 　　 (1) 把符号表中当前所记录之变量 A ， B 与 C 的待用信息及活跃信息附加到四元式 (i) 上； 　　 (2) 在符号表中，把与 A 相应的待用信息栏及活跃信息栏分别置为“无待用”及“非活跃”； 　　 (3) 在符号表中，把 B 和 C 的待用信息栏均置为 (i) ，把它们的活跃信息栏置为“活跃”。 lec08-memoryorg September 3, 2012
• ### Code generator

1. 1. CODE GENERATION (Part I)
2. 2. Agenda• Introduction• Code Generation• Issues in the Design of a Code Generator• The Target Language• Addresses in the Target Code• Basic Blocks and Flow Graphs• Optimization of Basic Blocks• Next…09/03/12 2
3. 3. Introduction • The final phase in our compiler modelSource Front End Intermediate Code Intermediate Code Targetprogram code Optimizer code Generator program Position Of a Code Generator 09/03/12 3
4. 4. Code Generation• This phase generates the target code consisting of assembly code. 1. Memory locations are selected for each variable; 2. Instructions are translated into a sequence of assembly instructions; 3. Variables and intermediate results are assigned to memory registers.09/03/12 4
5. 5. Issue in the Design of a Code Generator• Input to the Code Generator• The Target Program• Instruction Selection• Register Allocation• Evaluation Order09/03/12 5
6. 6. Input to the Code Generator• The input to the code generator is – The intermediate representation of the source program produced by the frontend along with the symbol table.• Choices for the IR – Three-address representations – Virtual machine representations – Linear representations – Graphical representation09/03/12 6
7. 7. The Target Program• The instruction-set architecture of the target machine has a significant impact on the difficulty of constructing a good code generator that produces high-quality machine code.• The most common target-machine architecture are RISC, CISC, and stack based. – A RISC machine typically has many registers, three-address instructions, simple addressing modes, and a relatively simple instruction-set architecture.09/03/12 7
8. 8. Contd… – A CISC machine typically has few registers, two-address instructions, and variety of addressing modes, several register classes, variable-length instructions, and instruction with side effects. – In a stack-based machine, operations are done by pushing operands onto a stack and then performing the operations on the operands at the top of the stack.09/03/12 8
9. 9. Instruction Selection• Instruction selection is important to obtain efficient code• Suppose we translate three-address code x:=y+z to: MOV y,R0 ADD z,R0 MOV R0,x a:=a+1 MOV a,R0 ADD #1,R0 MOV R0,a Cost = 6 Better Better ADD #1,a INC a09/03/12 9 Cost = 3 Cost = 2
10. 10. Register Allocation• A key problem in code generation is deciding what values to hold in what registers.• Efficient utilization is particularly important.• The use of registers is often subdivided into two sub problems: 1. Register Allocation, during which we select the set of variables that will reside in registers at each point in the program. 2. Register assignment, during which we pick the specific register that a variable will reside in.09/03/12 10
11. 11. Contd…• Finding an optimal assignment of registers to variables is difficult, even with single-register machine.• Mathematically, the problem is NP-complete.09/03/12 11
12. 12. Evaluation Order• The order in which computations are performed can affect the efficiency of the target code.• Some computation orders require fewer registers to hold intermediate results than others.• However, picking a best order in the general case is a difficult NP-complete problem.09/03/12 12
13. 13. The Target Language• A Simple Target Machine Model• Program and Instruction Costs09/03/12 13
14. 14. A Simple Target Machine Model• Our target computer models a three-address machine with load and store operations, computation operations, jump operations, and conditional jumps.• The underlying computer is a byte-addressable machine with n general-purpose registers.09/03/12 14
15. 15. Contd…• Assume the following kinds of instructions are available: – Load operations – Store operations – Computation operations – Unconditional jumps – Conditional jumps09/03/12 15
16. 16. Contd…• Assume a variety of addressing models: – A variable name x referring o the memory location that is reserved for x. – Indexed address, a(r), where a is a variable and r is a register. – A memory can be an integer indexed by a register, for example, LD R1, 100(R2). – Two indirect addressing modes: *r and *100(r) – Immediate constant addressing mode09/03/12 16
17. 17. A Simple Target Machine Model• Example :x = y –z ⇒ LD R1, y x = *p ⇒ LD R1, p LD R2, z LD R2, 0(R1) SUB R1, R1, R2 ST x, R2 ST x, R1b = a[i] ⇒ LD R1, i *p = y ⇒ LD R1, p MUL R1, R1, 8 LD R2, y LD R2, a(R1) ST 0(R1), R2 ST b, R209/03/12 17
18. 18. a[j] = c ⇒ LD R1, c LD R2, j MUL R2, R2, 8 ST a(R2), R1if x < y goto L ⇒ LD R1, x LD R2, y SUB R1, R1, R2 BLTZ R1, L09/03/12 18
19. 19. Program and Instruction Costs• For simplicity, we take the cost of an instruction to be one plus the costs associated with the addressing modes of the operands.• Addressing modes involving registers have zero additional cost, while those involving a memory location or constant in them have an additional cost f one.09/03/12 19
20. 20. Contd…• For example, – LD R0, R1 cost = 1 – LD R0, M cost = 2 – LD R1, *100(R2) cost = 309/03/12 20
21. 21. Addresses in the Target Code• Static Allocation• Stack Allocation• Run-Time Allocation09/03/12 21
22. 22. Static Allocation• Focus on the following three-address statements: – Call callee – Return – Halt – Action09/03/12 22
23. 23. Static Allocation• Store return address and return control to caller• Store ST callee.staticArea , #here + 20 BR callee.codeArea• Return BR *callee.staticArea09/03/12 23
24. 24. Runtime Addresses for Names• Assumption: a name in a three-address statement is really a pointer to a symbol- table entry for that name.• Note that names must eventually be replaced by code to access storage locations09/03/12 24
25. 25. Contd…• Example: – x=0 – Suppose the symbol-table entry for x contains a relative address 12 – x is in a statically allocated area beginning at address static – the actual run-time address of x is static + 12 – The actual assignment: static [ 12] = 0 – For a static area starting at address 100: LD 112, #009/03/12 25
26. 26. Basic Blocks and Flow Graphs• Basic Blocks• Next-Use Information• Flow Graphs• Representation of Flow Graphs• Loops09/03/12 26
27. 27. Basic Blocks• Algorithm: Partitioning three-address instructions into basic blocks. INPUT: A sequence of three-address instructions. OUTPUT: A list of the basic blocks for that sequence in which each instruction is assigned to exactly one basic block.09/03/12 27
28. 28. Contd… METHOD: First, we determine those instructions in the intermediate code that are leaders. rules for finding leaders are: 1. The first three-address instruction in the intermediate code is a leader. 2. Any instruction that is the target of a conditional or unconditional jump is a leader. 3. Any instruction that immediately follows a conditional or unconditional jump is a leader.09/03/12 28
29. 29. Contd…• Find the leaders09/03/12 29
30. 30. Next-Use Information• The use of a name in a three-address statement: – Three-address statement i assigns a value to x – Statement j has x as an operand – Control can flow from statement i to j along a path that has no intervening assignments to x – Then statement j uses the value of x computed at i . – Say that x is live at statement i .09/03/12 30
31. 31. Next-Use Information• Algorithm (for x=y+z) : Determining the liveness and next-use information for each statement in a basic block. – INPUT: A basic block B of three-address statements. Assume the symbol table initially shows all nontemporary variables in B as being live on exit. – OUTPUT: At each statement i : x = y + z in B, attach to i the liveness and next-use information of x, y, and z .09/03/12 31
32. 32. Contd… – METHOD: Start at the last statement in B and scan backwards to the beginning of B. At each statement i: x = y + z in B, do the following: 1. Attach to i the information currently found in the symbol table regarding the next use and liveness of x , y, and z. 2. In the symbol table, set x to "not live" and "no next use." 3. In the symbol table, set y and z to "live" and the next uses of y and z to i.09/03/12 32
33. 33. Flow Graphs• A flow graph is a graphical depiction of a sequence of instructions with control flow edges• A flow graph can be defined at the intermediate code level or target code level MOV 1,R0 MOV 0,R0 MOV n,R1 MOV n,R1 JMP L2 JMP L2 L1: MUL 2,R0 L1: MUL 2,R0 SUB 1,R1 SUB 1,R109/03/12 L2: JMPNZ R1,L1 L2: JMPNZ R1,L1 33
34. 34. Loops• A loop is a collection of basic blocks, such that – All blocks in the collection are strongly connected – The collection has a unique entry, and the only way to reach a block in the loop is through the entry09/03/12 34
35. 35. Optimizing of Basic Block• Compile time evaluation• Common sub-expression elimination• Code motion• Strength Reduction• Dead code elimination• Algebraic Transformations
36. 36. Compile-Time Evaluation• Expressions whose values can be pre-computed at the compilation time• Two ways: – Constant folding – Constant propagation 36
37. 37. Compile-Time Evaluation• Constant folding: Evaluation of an expression with constant operands to replace the expression with single value• Example: area := (22.0/7.0) * r ^ 2 area := 3.14286 * r ^ 2 37
38. 38. Compile-Time Evaluation• Constant Propagation: Replace a variable with constant which has been assigned to it earlier.• Example: pi := 3.14286 area = pi * r ^ 2 area = 3.14286 * r ^ 2
39. 39. Common Sub-expression Elimination• Local common sub-expression elimination – Performed within basic blocks. a := b * c temp := b * c … a := temp … … … x := b * c + 5 x := temp + 5
40. 40. Code Motion• Moving code from one part of the program to other without modifying the algorithm – Reduce size of the program – Reduce execution frequency of the code subjected to movement 40
41. 41. Code Motion• Similar to common sub-expression elimination but with the objective to reduce code size. temp := x * 2 If(a<b) then If(a<b) then z:= x * 5 z:= temp else else y := x * 5 + 2 y := temp + 2
42. 42. Strength Reduction• Replacement of an operator with a less costly one. X=x^2 X=x*x Y=y*2 Y=y+y
43. 43. Dead Code Elimination• Dead Code are portion of the program which will not be executed in Basic block. If(a==b) If(a==b) { { b=c ; b=c ; ….. ….. return b ; return b ; c=0; } }
44. 44. References• Alfred V. Aho, Ravi Sethi, and Jeffrey D. Ullman, “Compilers: Principles, Techniques, and Tools” Addison-Wesley, 1986.• http://en.wikipedia.org/wiki/Code_generation_(compiler)• http://www.mec.ac.in/resources/notes/notes/compiler/mo dule5/codegenissues.htm09/03/12 44