Parasitic Extraction Tanner EDA’s HiPer PX helps you reliably design high-performance circuits in modern process technolog...
<ul><li>First EDA solution on Windows </li></ul><ul><li>Development, sales and support of IC design tools since 1988  </li...
Interconnect Parasitics in Modern Processes <ul><li>As process geometries shrink, the impact of interconnect parasitic eff...
Traditional Approaches <ul><li>Manual estimation on known-critical nets </li></ul><ul><ul><li>easy to miss unexpected prob...
HiPer PX <ul><li>Tanner EDA’s parasitic extraction tool </li></ul><ul><li>Proven technology </li></ul><ul><ul><li>Intercon...
HiPer PX – 2D and 3D <ul><li>2-D Mode (table interpolation) </li></ul><ul><ul><li>2-D extraction is extremely fast (>1M tr...
Extract Early and Often <ul><li>HiPer PX extracts both devices and interconnect parasitics in one pass </li></ul><ul><li>N...
Accurate Post-Layout Simulations <ul><li>All resistors and capacitors are treated the same </li></ul><ul><ul><li>drawn res...
Faster Simulations <ul><li>Netlist reduction  </li></ul><ul><ul><li>fastest possible simulations with accuracy guaranteed ...
Flexible <ul><li>Analyze just resistance or just capacitance at the push of a button </li></ul><ul><li>Selectively extract...
Tanner EDA <ul><li>Find out more via: </li></ul><ul><li>www.TannerEDA.com </li></ul><ul><li>Contact sales: </li></ul><ul><...
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Parasitic Extraction Product from Tanner EDA

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Parasitic Extraction: Tanner EDA’s HiPer PX helps you reliably design high-performance circuits in modern process technologies.

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  • Parasitic Extraction Product from Tanner EDA

    1. 1. Parasitic Extraction Tanner EDA’s HiPer PX helps you reliably design high-performance circuits in modern process technologies.
    2. 2. <ul><li>First EDA solution on Windows </li></ul><ul><li>Development, sales and support of IC design tools since 1988 </li></ul><ul><li>25,000 installed seats worldwide – Global presence </li></ul><ul><li>Expertise in advanced microelectronics research such as MEMS, speech recognition, active pixel imagers and data acquisition systems </li></ul>Tanner EDA Facts Tanner Research, Inc. Headquarters Monrovia, CA
    3. 3. Interconnect Parasitics in Modern Processes <ul><li>As process geometries shrink, the impact of interconnect parasitic effects gets larger </li></ul><ul><li>Importance has shifted from vertical to lateral crosstalk capacitance </li></ul>
    4. 4. Traditional Approaches <ul><li>Manual estimation on known-critical nets </li></ul><ul><ul><li>easy to miss unexpected problems </li></ul></ul><ul><li>Avoidance and mitigation techniques </li></ul><ul><ul><li>wasteful of area, time </li></ul></ul><ul><li>Lumped vertical extraction </li></ul><ul><ul><li>misses now-dominant lateral crosstalk capacitance </li></ul></ul>
    5. 5. HiPer PX <ul><li>Tanner EDA’s parasitic extraction tool </li></ul><ul><li>Proven technology </li></ul><ul><ul><li>Interconnect extract engine based on the long-running and influential Space project at TU Delft </li></ul></ul><ul><li>Integrated with L-Edit </li></ul><ul><li>RC interconnect models </li></ul><ul><li>2D, 3D, and hybrid extract modes </li></ul><ul><li>Frequency based circuit reduction </li></ul>
    6. 6. HiPer PX – 2D and 3D <ul><li>2-D Mode (table interpolation) </li></ul><ul><ul><li>2-D extraction is extremely fast (>1M transistors/hr) </li></ul></ul><ul><ul><li>Accurate enough for many designs, and fast enough to extract huge circuits </li></ul></ul><ul><li>3-D Mode (boundary element) </li></ul><ul><ul><li>Maximum accuracy </li></ul></ul><ul><ul><li>Still fast enough to run medium sized circuits (thousands of transistors) </li></ul></ul>
    7. 7. Extract Early and Often <ul><li>HiPer PX extracts both devices and interconnect parasitics in one pass </li></ul><ul><li>No requirement for an LVS pass; extract while you work and catch problems early </li></ul>
    8. 8. Accurate Post-Layout Simulations <ul><li>All resistors and capacitors are treated the same </li></ul><ul><ul><li>drawn resistors and capacitors divided into finite elements </li></ul></ul>
    9. 9. Faster Simulations <ul><li>Netlist reduction </li></ul><ul><ul><li>fastest possible simulations with accuracy guaranteed up to specified frequency </li></ul></ul>
    10. 10. Flexible <ul><li>Analyze just resistance or just capacitance at the push of a button </li></ul><ul><li>Selectively extract parasitics on important nets </li></ul><ul><li>Extract a single cell, a clipped out region, or the whole chip </li></ul>
    11. 11. Tanner EDA <ul><li>Find out more via: </li></ul><ul><li>www.TannerEDA.com </li></ul><ul><li>Contact sales: </li></ul><ul><ul><li>[email_address] </li></ul></ul><ul><ul><li>1-877-325-2223 </li></ul></ul>
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