ByMD Nabil Shahriar(110EC0644)Under Professor S K PatraDepartment of electronics & communication EngineeringNational Institute of technology RourkelaNote: This document holds contents from various sources including internet sources & referred textbooks. It doesn’t hold any copyright claim.
8086 Microprocessor:In 1976, when Intel began designing the 8086 processor, which was the first 16 bitmicroprocessor. Memory was very expensive. Personal computers at the time, typicallyhad four thousand bytes of memory. Even when IBM introduced the PC five years later,64K was still quite a bit of memory; one megabyte was a tremendous amount. Intel’sdesigners felt that 64K memory would remain a large amount throughout the lifetime ofthe 8086. The only mistake they made was completely underestimating the lifetime ofthe8086. They figured it would last about five years, like their earlier 8080 processor.People were running up against the one megabyte limitof 8086 . So Intel gave us the 80386 in 1985. This processor could address up to maximum16 megabytes ofmemory.Register Organization:• The 8086 has four groups of the user accessible internal registers. They arethe instruction pointer, four data registers, four pointer and index register,four segment registers.• The 8086 has a total of fourteen 16-bit registers including a 16 bit registercalled the status register, with 9 of bits implemented for status and controlflags.• Most of the registers contain data offsets within 64 KB memory segment.There are four different 64 KB segments for instructions, stack, data and extradata. To specify where in 1 MB of processor memory these 4 segments arelocated the processor uses four segment registers:
• Code segment (CS) is a 16-bit register containing address of 64 KB segmentwith processor instructions. The processor uses CS segment for all accesses toinstructions referenced by instruction pointer (IP) register. CS register cannotbe changed directly. The CS register is automatically updated during far jump,far call and far return instructions.• Stack segment (SS) is a 16-bit register containing address of 64KB segmentwith program stack. By default, the processor assumes that all data referencedby the stack pointer (SP) and base pointer (BP) registers is located in the stacksegment. SS register can be changed directly using POP instruction.• Data segment (DS) is a 16-bit register containing address of 64KB segmentwith program data. By default, the processor assumes that all data referencedby general registers (AX, BX, CX, and DX) and index register (SI, DI) is located inthe data segment. DS register can be changed directly using POP and LDSinstructions.• Extra segment (ES) is a 16-bit register containing address of 64KB segment,usually with program data. By default, the processor assumes that the DIregister references the ES segment in string manipulation instructions. ESregister can be changed directly using POP and LES instructions.• It is possible to change default segments used by general and index registersby prefixing instructions with a CS, SS, DS or ES prefix.• All general registers of the 8086 microprocessor can be used for arithmeticand logic operations. The general registers are:• Accumulator register consists of two 8-bit registers AL and AH, which can becombined together and used as a 16- bit register AX. AL in this case containsthe low-order byte of the word, and AH contains the high-order byte.Accumulator can be used for I/O operations and string manipulation.• Base register consists of two 8-bit registers BL and BH, which can becombined together and used as a 16-bit register BX. BL in this case contains thelow-order byte of the word, and BH contains the high-order byte. BX registerUsually contains a data pointer used for based, based indexed or registerindirect addressing.
• Count register consists of two 8-bit registers CL and CH, which can becombined together and used as a 16-bit register CX. When combined, CLregister contains the low-order byte of the word, and CH contains the highorder byte. Count register can be used in Loop, shift/rotate instructions and asa counter in string manipulation,.• Data register consists of two 8-bit registers DL and DH, which can becombined together and used as a 16-bit register DX. When combined, DLregister contains the low-order byte of the word, and DH contains the highorder byte. Data register can be used as a port number in I/O operations. Ininteger 32-bit multiply and divide instruction the DX register contains highorder word of the initial or resulting number.• The following registers are both general and index registers:• Stack Pointer (SP) is a 16-bit register pointing to program stack.• Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BPregister is usually used for based, based indexed or register indirectaddressing.• Source Index (SI) is a 16-bit register. SI is used for indexed, based indexedand register indirect addressing, as well as a source data address in stringmanipulation instructions.• Destination Index (DI) is a 16-bit register. DI is used for indexed, basedindexed and register indirect addressing, as well as a destination data addressin string manipulation instructions.Other registers:• Instruction Pointer (IP) is a 16-bit register.• Flags is a 16-bit register containing 9 one bit flags.• Overflow Flag (OF) - set if the result is too large positive number, or is toosmall negative number to fit into destination operand.
• Direction Flag (DF) - if set then string manipulation instructions will auto-decrement index registers. If cleared then the index registers will be auto-incremented.• Interrupt-enable Flag (IF) - setting this bit enables makeable interrupts.• Single-step Flag (TF) - if set then single-step interrupt will occur after thenext instruction.• Sign Flag (SF) - set if the most significant bit of the result is set.• Zero Flag (ZF) - set if the result is zero.• Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3in the AL register.• Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte ofthe result is even.• Carry Flag (CF) - set if there was a carry from or borrows to the mostsignificant bit during last result calculation.Addressing Modes:• Implied - the data value/data address is implicitly associated with theinstruction.• Register - references the data in a register or in a register pair.• Immediate - the data is provided in the instruction.• Direct - the instruction operand specifies the memory address where data islocated.• Register indirect - instruction specifies a register containing an address,where data is located. This addressing mode works with SI, DI, BX and BPregisters.
• Based: - 8-bit or 16-bit instruction operand is added to the contents of a baseregister (BX or BP), the resulting value is a pointer to location where dataresides.• Indexed: - 8-bit or 16-bit instruction operand is added to the contents of anindex register (SI or DI), the resulting value is a pointer to location where dataresides.• Based Indexed: - the contents of a base register (BX or BP) is added to thecontents of an index register (SI or DI), the resulting value is a pointer tolocation where data resides.• Based Indexed with displacement: - 8-bit or 16-bit instruction operand isadded to the contents of a base register (BX or BP) and index register (SI or DI),the resulting value is a pointer to location where data resides.
80386 Microprocessor:The Intel 80386, also known as the i386, or just 386, was a 32-bit microprocessor introduced by Intel in 1985. The first versions had 275,000transistors and were used as the central processing unit (CPU) ofmany workstations and high-end personal computers of the time. As theoriginal implementation of the 32-bit extension of the 8086 architecture, the80386 instruction set, programming model, and binary encodings are stillthe common denominator for all 32-bit x86 processorsRegister Organisation• The 80386 has eight 32 - bit general purpose registers which may be used aseither 8 bit or 16 bit registers.• A 32 - bit register known as an extended register, is represented by theregister name with prefix E.• Example: A 32 bit register corresponding to AX is EAX, similarly BX is EBX etc.• The 16 bit registers BP, SP; SI and DI in 8086 are now available with theirextended size of 32 bit and are names as EBP, ESP, ESI and EDI.• AX represents the lower 16 bit of the 32 bit register EAX.
• BP, SP, SI, DI represents the lower 16 bit of their 32 bit Counterparts, and canbe used as independent 16 bit registers.• The six segment registers available in 80386 are CS, SS, DS, ES, FS and GS.• The CS and SS are the code and the stack segment registers respectively,while DS, ES, FS, GS are 4 data segment registers.• A 16 bit instruction pointer IP is available along with 32 bit counterpart EIP.• Flag Register of 80386: The Flag register of 80386 is a 32 bit register. Out ofthe 32 bits, Intel has reserved bits D18 to D31, D5 and D3, while D1 is alwaysset at 1.Two extra new flags are added to the 80286 flag to derive the flagregister of 80386. They are VM and RF flags.• VM - Virtual Mode Flag: If this flag is set, the 80386 enters the virtual 8086mode within the protection mode. This is to be set only when the 80386 is inprotected mode. In this mode, if any privileged instruction is executed anexception 13 is generated. This bit can be set using IRET instruction or anytask switch operation only in the protected mode.• RF- Resume Flag: This flag is used with the debug register breakpoints. It ischecked at the starting of every instruction cycle and if it is set, any debug faultis ignored during the instruction cycle. The RF is automatically reset afterSuccessful execution of every instruction, except for IRET and POPFinstructions.• Also, it is not automatically cleared after the successful execution of JMP,CALL and INT instruction causing a task switch. These instructions are used toset the RF to the value specified by the memory data available at the stack.• Segment Descriptor Registers: This registers are not available forprogrammers, rather they are internally used to store the descriptorinformation, like attributes, limit and base addresses of segments.• The six segment registers have corresponding six 73 bit descriptor registers.Each of them contains 32 bit base address, 32 bit base limit and 9 bitattributes. These are automatically loaded when the corresponding segmentsare loaded with selectors.
• Scaled Indexed Mode: Contents of the index register are multiplied by ascale factor that may be added further to get the operand offset.• Control Registers: The 80386 has three 32 bit control registers CR), CR2 andCR3 to hold global machine status independent of the executed task. Load andstore instructions are available to access these registers.• System Address Registers: Four special registers are defined to refer to thedescriptor tables supported by 80386.• The 80386 supports four types of descriptor table, viz. global descriptor table(GDT), interrupt descriptor table (IDT), local descriptor table (LDT) and taskstate segment descriptor (TSS).• Debug and Test Registers: Intel has provided a set of 8 debug registers forhardware debugging. Out of these eight registers DR0 to DR7, two registersDR4 and DR5 are Intel reserved.• The initial four registers DR0 to DR3 store four program controllablebreakpoint addresses, while DR6 and DR7 respectively hold breakpoint statusand breakpoint control information.• Two more test register are provided by 80386 for page cacheing namely testcontrol and test status register.• Addressing Modes:The 80386 supports overall eleven addressing modes to facilitate efficientexecution of higher level language programs.• In case of all those modes, the 80386 can now have 32-bit immediate or 32-bit register operands or displacements.• The 80386 has a family of scaled modes. In case of scaled modes, any of theindex register values can be multiplied by a valid scale factor to obtain thedisplacement.
• The valid scale factor are 1, 2, 4 and 8.• The different scaled modes are as follows.• Based Scaled Indexed Mode: Contents of the index register are multiplied bya scale factor and then added to base register to obtain the offset.• Based Scaled Indexed Mode with Displacement: The Contents of the indexregister are multiplied by a scaling factor and the result is added to a baseregister and displacement to get the offset of an operand.