Ne555

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Ne555

  1. 1. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 D Timing From Microseconds to Hours NE555 . . . D, P, PS, OR PW PACKAGE D Astable or Monostable Operation SA555 . . . D OR P PACKAGE SE555 . . . D, JG, OR P PACKAGE D Adjustable Duty Cycle (TOP VIEW) D TTL-Compatible Output Can Sink or Source GND 1 8 VCC up to 200 mA TRIG 2 7 DISCH D Designed To Be Interchangeable With OUT 3 6 THRES Signetics NE555, SA555, and SE555 RESET 4 5 CONTdescription SE555 . . . FK PACKAGE These devices are precision timing circuits (TOP VIEW) capable of producing accurate time delays or GND VCC NC NC NC oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In 3 2 1 20 19 NC 4 18 NC the astable mode of operation, the frequency and TRIG 5 17 DISCH duty cycle can be controlled independently with NC 6 16 NC two external resistors and a single external OUT 7 15 THRES capacitor. NC 8 14 NC The threshold and trigger levels normally are 9 10 11 12 13 two-thirds and one-third, respectively, of VCC. NC RESET NC NC CONT These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and NC – No internal connection the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground. The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs. The NE555 is characterized for operation from 0°C to 70°C. The SA555 is characterized for operation from –40°C to 85°C. The SE555 is characterized for operation over the full military range of –55°C to 125°C. AVAILABLE OPTIONS PACKAGE PLASTIC TA SMALL CHIP CERAMIC PLASTIC VTHRES MAX THIN SHRINK OUTLINE CARRIER DIP DIP VCC = 15 V SMALL OUTLINE (D, PS) (FK) (JG) (P) (PW) NE555D 0°C to 70°C 11.2 V — — NE555P NE555PW NE555PS –40°C to 85°C 11.2 V SA555D — — SA555P — –55°C to 125°C 10.6 V SE555D SE555FK SE555JG SE555P — The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR). The PS and PW packages are only available taped and reeled. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date. Copyright  2002, Texas Instruments IncorporatedProducts conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are testedstandard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, productiontesting of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1
  2. 2. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 FUNCTION TABLE TRIGGER THRESHOLD DISCHARGE RESET OUTPUT VOLTAGE† VOLTAGE† SWITCH Low Irrelevant Irrelevant Low On High <1/3 VDD Irrelevant High Off High >1/3 VDD >2/3 VDD Low On High >1/3 VDD <2/3 VDD As previously established † Voltage levels shown are nominal.functional block diagram VCC RESET 8 CONT 4 5 6 Î R1 THRES Î R 1 3 OUT Î Î Î Î S 2 TRIG ÎÎ 7 DISCH 1 GNDPin numbers shown are for the D, JG, P, PS, and PW packages.NOTE A: RESET can override TRIG, which can override THRES.2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  3. 3. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Input voltage (CONT, RESET, THRES, and TRIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC Output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±225 mA Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, PS, or PW package . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES: 1. All voltage values are with respect to GND. 2. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C PACKAGE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG (SE555) 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mWrecommended operating conditions MIN MAX UNIT SA555, NE555 4.5 16 VCC Supply voltage V SE555 4.5 18 VI Input voltage (CONT, RESET, THRES, and TRIG) VCC V IO Output current ±200 mA NE555 0 70 TA Operating free-air temperature SA555 –40 85 °C SE555 –55 125 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3
  4. 4. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002electrical characteristics, VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted) NE555 SE555 PARAMETER TEST CONDITIONS SA555 UNIT MIN TYP MAX MIN TYP MAX VCC = 15 V 9.4 10 10.6 8.8 10 11.2 THRES voltage level V VCC = 5 V 2.7 3.3 4 2.4 3.3 4.2 THRES current (see Note 3) 30 250 30 250 nA 4.8 5 5.2 4.5 5 5.6 VCC = 15 V TA = –55°C to 125°C 3 6 TRIG voltage level V 1.45 1.67 1.9 1.1 1.67 2.2 VCC = 5 V TA = –55°C to 125°C 1.9 TRIG current TRIG at 0 V 0.5 0.9 0.5 2 µA 0.3 0.7 1 0.3 0.7 1 RESET voltage level V TA = –55°C to 125°C 1.1 RESET at VCC 0.1 0.4 0.1 0.4 RESET current mA RESET at 0 V –0.4 –1 –0.4 –1.5 DISCH switch off-state current 20 100 20 100 nA 9.6 10 10.4 9 10 11 VCC = 15 V TA = –55°C to 125°C 9.6 10.4 CONT voltage (open circuit) V 2.9 3.3 3.8 2.6 3.3 4 VCC = 5 V TA = –55°C to 125°C 2.9 3.8 VCC = 15 V, , 0.1 0.15 0.1 0.25 IOL = 10 mA TA = –55°C to 125°C 0.2 VCC = 15 V, , 0.4 0.5 0.4 0.75 IOL = 50 mA TA = –55°C to 125°C 1 VCC = 15 V,, 2 2.2 2 2.5 IOL = 100 mA TA = –55°C to 125°C 2.7 Low-level out ut voltage output V VCC = 15 V, IOL = 200 mA 2.5 2.5 VCC = 5 V, TA = –55°C to 125°C 0.35 IOL = 3.5 mA VCC = 5 V, , 0.1 0.2 0.1 0.35 IOL = 5 mA TA = –55°C to 125°C 0.8 VCC = 5 V, IOL = 8 mA 0.15 0.25 0.15 0.4 VCC = 15 V, , 13 13.3 12.75 13.3 IOH = –100 mA TA = –55°C to 125°C 12 High-level output voltage VCC = 15 V, IOH = –200 mA 12.5 12.5 V VCC = 5 V, , 3 3.3 2.75 3.3 IOH = –100 mA TA = –55°C to 125°C 2 Output low, , VCC = 15 V 10 12 10 15 No load VCC = 5 V 3 5 3 6 Supply current mA Output high, g VCC = 15 V 9 10 9 13 No load VCC = 5 V 2 4 2 5NOTE 3: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when VCC = 5 V, the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is 10 MΩ.4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  5. 5. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002operating characteristics, VCC = 5 V and 15 V NE555 TEST SE555 PARAMETER SA555 UNIT CONDITIONS† MIN TYP MAX MIN TYP MAX Initial error Each timer, monostable§ 0.5% 1.5%* 1% 3% TA = 25°C of timing interval‡ Each timer, astable¶ 1.5% 2.25% Temperature coefficient Each timer, monostable§ 30 100* 50 TA = MIN to MAX ppm/°C of timing interval Each timer, astable¶ 90 150 Supply-voltage sensitivity y g y Each timer, monostable§ 0.05 0.2* 0.1 0.5 TA = 25°C %/V of timing interval Each timer, astable¶ 0.15 0.3 CL = 15 pF, Output-pulse rise time 100 200* 100 300 ns TA = 25°C CL = 15 pF, Output-pulse fall time 100 200* 100 300 ns TA = 25°C* On products compliant to MIL-PRF-38535, this parameter is not production tested.† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run.§ Values specified are for a device in a monostable circuit similar to Figure 9, with the following component values: RA = 2 kΩ to 100 kΩ, C = 0.1 µF.¶ Values specified are for a device in an astable circuit similar to Figure 12, with the following component values: RA = 1 kΩ to 100 kΩ, C = 0.1 µF. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5
  6. 6. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 10 7 ÏÏÏÏ VCC = 5 V 10 7 ÏÏÏÏ VCC = 10 V ÏÏÏÏ ÏÏÏÏ VOL – Low-Level Output Voltage – V 4 4 VOL – Low-Level Output Voltage – V 2 2 ÏÏÏÏ TA = –55°C ÏÏÏÏ TA = 25°C 1 0.7 ÏÏÏÏ TA = 25°C 1 0.7 ÏÏÏÏ Ï ÏÏÏÏ TA= –55°C 0.4 ÏÏÏÏ 0.4 ÏÏÏÏÏ TA = 125°C TA = 125°C ÏÏÏÏÏ 0.2 0.1 ÏÏÏÏÏ 0.2 0.1 0.07 0.07 0.04 0.04 0.02 0.02 0.01 0.01 1 2 4 7 10 20 40 70 100 1 2 4 7 10 20 40 70 100 IOL – Low-Level Output Current – mA IOL – Low-Level Output Current – mA Figure 1 Figure 2 LOW-LEVEL OUTPUT VOLTAGE DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT vs vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT 10 2.0 7 ÏÏÏÏVCC = 15 V 1.8 ÏÏÏÏ TA = –55°C 4 ÏÏÏÏ VOL – Low-Level Output Voltage – V TA = –55°C ( VCC – VOH) – Voltage Drop – V 1.6 2 ÏÏÏÏ TA = 25°C 1 1.4 ÏÏÏÏ 0.7 1.2 TA = 125°C 0.4 TA = 25°C 1 ÏÏÏÏ 0.2 TA = 125°C 0.8 0.1 0.07 0.6 0.04 0.4 0.02 0.2 0.01 0 ÏÏÏÏÏÏ VCC = 5 V to 15 V 1 2 4 7 10 20 40 70 100 1 2 4 7 10 20 40 70 100 IOL – Low-Level Output Current – mA IOH – High-Level Output Current – mA Figure 3 Figure 4†Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only.6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  7. 7. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 TYPICAL CHARACTERISTICS† NORMALIZED OUTPUT PULSE DURATION SUPPLY CURRENT (MONOSTABLE OPERATION) vs vs SUPPLY VOLTAGE SUPPLY VOLTAGE 10 1.015 Pulse Duration Relative to Value at VCC = 10 V Output Low, 9 No Load 8 1.010 TA = 25°C I CC – Supply Current – mA 7 1.005 6 5 1 TA = –55°C 4 TA = 125°C 0.995 3 2 0.990 1 0 0.985 5 6 7 8 9 10 11 12 13 14 15 0 5 10 15 20 VCC – Supply Voltage – V VCC – Supply Voltage – V Figure 5 Figure 6 NORMALIZED OUTPUT PULSE DURATION PROPAGATION DELAY TIME (MONOSTABLE OPERATION) vs vs LOWEST VOLTAGE LEVEL FREE-AIR TEMPERATURE OF TRIGGER PULSE 1.015 300 Pulse Duration Relative to Value at TA = 25 °C VCC = 10 V TA = 125°C tpd – Propagation Delay Time – ns 1.010 250 TA = 70°C TA = 25°C 1.005 200 1 150 TA = 0°C 0.995 100 TA = –55°C 0.990 50 0.985 0 –75 –50 –25 0 25 50 75 100 125 0 0.1 × VCC 0.2 × VCC 0.3 × VCC 0.4 × VCC TA – Free-Air Temperature – °C Lowest Voltage Level of Trigger Pulse Figure 7 Figure 8†Data for temperatures below 0°C and above 70°C are applicable for SE555 series circuits only. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7
  8. 8. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONmonostable operation For monostable operation, any of these timers can be connected as shown in Figure 9. If the output is low, application of a negative-going pulse to the trigger (TRIG) sets the flip-flop (Q goes low), drives the output high, and turns off Q1. Capacitor C then is charged through RA until the voltage across the capacitor reaches the threshold voltage of the threshold (THRES) input. If TRIG has returned to a high level, the output of the threshold comparator resets the flip-flop (Q goes high), drives the output low, and discharges C through Q1. ÏÏÏÏÏ RA = 9.1 kΩ CL = 0.01 µF ÏÏÏÏÏ RL = 1 kΩ VCC (5 V to 15 V) ÏÏÏÏÏ See Figure 9 ÏÏÏÏÏ Input Voltage Voltage – 2 V/div RA 5 8 CONT VCC RL 4 RESET Î 7 DISCH 3 OUT Output Output Voltage 6 THRES 2 Input TRIG GND 1 ÏÏÏÏÏÏCapacitor Voltage Pin numbers shown are for the D, JG, P, PS, and PW packages. Time – 0.1 ms/div Figure 9. Circuit for Monostable Operation Figure 10. Typical Monostable Waveforms Monostable operation is initiated when TRIG 10 voltage falls below the trigger threshold. Once RA = 10 MΩ initiated, the sequence ends only if TRIG is high at the end of the timing interval. Because of the 1 threshold level and saturation voltage of Q1, RA = 1 MΩ the output pulse duration is approximately tw – Output Pulse Duration – s tw = 1.1RAC. Figure 11 is a plot of the time 10–1 constant for various values of RA and C. The threshold levels and charge rates both are directly proportional to the supply voltage, VCC. The timing 10–2 interval is, therefore, independent of the supply voltage, so long as the supply voltage is constant 10–3 during the time interval. RA = 100 kΩ Applying a negative-going trigger pulse RA = 10 kΩ simultaneously to RESET and TRIG during the 10–4 timing interval discharges C and reinitiates the RA = 1 kΩ cycle, commencing on the positive edge of the 10–5 reset pulse. The output is held low as long as the 0.001 0.01 0.1 1 10 100 reset pulse is low. To prevent false triggering, C – Capacitance – µF when RESET is not used, it should be connected to VCC. Figure 11. Output Pulse Duration vs Capacitance8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  9. 9. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONastable operation As shown in Figure 12, adding a second resistor, RB, to the circuit of Figure 9 and connecting the trigger input to the threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C charges through RA and RB and then discharges through RB only. Therefore, the duty cycle is controlled by the values of RA and RB. This astable connection results in capacitor C charging and discharging between the threshold-voltage level (≈0.67 × VCC) and the trigger-voltage level (≈0.33 × VCC). As in the monostable circuit, charge and discharge times (and, therefore, the frequency and duty cycle) are independent of the supply voltage. RA = 5 k W ÏÏÏÏÏÏÏÏÏÏ RL = 1 kW VCC RB = 3 k W (5 V to 15 V) ÏÏÏÏÏÏÏÏÏÏ C = 0.15 µF See Figure 12 0.01 µF ÏÏÏÏÏÏÏÏÏÏ Open Voltage – 1 V/div (see Note A) 5 8 RA CONT VCC 4 RL RESET ÎÎ 7 DISCH 3 OUT Output RB 6 THRES tH 2 TRIG tL Output Voltage GND C 1Pin numbers shown are for the D, JG, P, PS, and PW packages. Capacitor VoltageNOTE A: Decoupling CONT voltage to ground with a capacitor can improve operation. This should be evaluated for individual applications. Time – 0.5 ms/div Figure 12. Circuit for Astable Operation Figure 13. Typical Astable Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9
  10. 10. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONastable operation (continued) Figure 13 shows typical waveforms generated during astable operation. The output high-level duration tH and low-level duration tL can be calculated as follows: 100 k t H + 0.693 (RA ) RB) C RA + 2 RB = 1 kΩ t + 0.693 (R C RA + 2 RB = 10 kΩ 10 k f – Free-Running Frequency – Hz L B) RA + 2 RB = 100 kΩ Other useful relationships are shown below. + tH ) tL + 0.693 (RA ) 2RB) C 1k period frequency [ (R ) 2R ) C 1.44 100 A B Output driver duty cycle + t t) t + R )B2R L R 10 H L A B Output waveform duty cycle 1 + ) + t R RA + 2 RB = 1 MΩ ) H 1– B t t R 2R RA + 2 RB = 10 MΩ H L A B 0.1 + + t R 0.001 0.01 0.1 1 10 100 ) Low- t o-high ratio L B t R R C – Capacitance – µF H A B Figure 14. Free-Running Frequency10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  11. 11. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONmissing-pulse detector The circuit shown in Figure 15 can be used to detect a missing pulse or abnormally long spacing between consecutive pulses in a train of pulses. The timing interval of the monostable circuit is retriggered continuously by the input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing, missing pulse, or terminated pulse train permits the timing interval to be completed, thereby generating an output pulse as shown in Figure 16. VCC (5 V to 15 V) ÏÏÏÏÏ VCC = 5 V ÏÏÏÏÏ RA = 1 kΩ C = 0.1 µF 4 8 RL RA ÏÏÏÏÏ See Figure 15Input 2 RESET VCC OUT 3 Output ÏÏÏÏÏ ÏÏÏ Voltage – 2 V/div TRIG Input Voltage 7 DISCH 5 CONT 6 THRES 0.01 µF GND C ÏÏÏÏÏ Output Voltage 1 ÏÏÏÏÏ A5T3644 Capacitor VoltagePin numbers shown are shown for the D, JG, P, PS, and PW packages. Time – 0.1 ms/div Figure 15. Circuit for Missing-Pulse Detector Figure 16. Completed-Timing Waveforms for Missing-Pulse Detector POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11
  12. 12. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONfrequency divider By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency divider. Figure 17 shows a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle. ÏÏÏÏÏ VCC = 5 V RA = 1250 Ω ÏÏÏÏÏ C = 0.02 µF ÏÏÏÏÏ See Figure 9 ÏÏÏÏÏ Voltage – 2 V/div Input Voltage Output Voltage Capacitor Voltage Time – 0.1 ms/div Figure 17. Divide-by-Three Circuit Waveformspulse-width modulation The operation of the timer can be modified by modulating the internal threshold and trigger voltages, which is accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 19 shows the resulting output pulse-width modulation. While a sine-wave modulation signal is illustrated, any wave shape could be used.12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  13. 13. NE555, SA555, SE555 PRECISION TIMERS SLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATION VCC (5 V to 15 V) ÏÏÏÏÏ RA = 3 kΩ C = 0.02 µF ÏÏÏÏÏ RL = 1 kΩ See Figure 18 RL RA ÏÏÏÏÏ 4 RESET VCC 8 ÏÏÏÏÏÏÏ Modulation Input Voltage Clock 2 OUT 3 Output ÏÏÏÏÏÏÏ Voltage – 2 V/div TRIG Input DISCH 7 ÏÏÏÏÏÏÏ Clock Input Voltage Modulation Input 5 CONT ÏÏÏÏÏÏÏ 6(see Note A) THRES GND 1 C ÏÏÏÏÏ Output VoltagePin numbers shown are for the D, JG, P, PS, and PW packages. ÏÏÏÏÏNOTE A: The modulating signal can be direct or capacitively coupled Capacitor Voltage to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer ÏÏÏÏÏÏ Time – 0.5 ms/div should be considered. Figure 18. Circuit for Pulse-Width Modulation Figure 19. Pulse-Width-Modulation Waveformspulse-position modulation As shown in Figure 20, any of these timers can be used as a pulse-position modulator. This application modulates the threshold voltage and, thereby, the time delay, of a free-running oscillator. Figure 21 shows a triangular-wave modulation signal for such a circuit; however, any wave shape could be used. VCC (5 V to 15 V) ÏÏÏÏÏÏ RA = 3 kΩ ÏÏÏÏÏÏ RB = 500 Ω ÏÏÏÏÏÏ RL = 1 kΩ See Figure 20 4 RESET VCC 8 RL 3 RA ÏÏÏÏÏÏ Voltage – 2 V/div 2 OUT Output TRIG ÏÏÏÏÏÏÏÏ Modulation Input Voltage DISCH 7 ÏÏÏÏÏÏÏÏ Modulation RB Input 5 CONT 6(see Note A) THRES GND C ÏÏÏÏÏÏ Output VoltagePin numbers shown are for the D, JG, P, PS, and PW packages. ÏÏÏÏÏÏNOTE A: The modulating signal can be direct or capacitively coupled to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer ÏÏÏÏÏÏ Capacitor Voltage should be considered. ÏÏÏÏÏÏ Time – 0.1 ms/div Figure 20. Circuit for Pulse-Position Modulation Figure 21. Pulse-Position-Modulation Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13
  14. 14. NE555, SA555, SE555PRECISION TIMERSSLFS022C – SEPTEMBER 1973 – REVISED FEBRUARY 2002 APPLICATION INFORMATIONsequential timer Many applications, such as computers, require signals for initializing conditions during start-up. Other applications, such as test equipment, require activation of test signals in sequence. These timing circuits can be connected to provide such sequential control. The timers can be used in various combinations of astable or monostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22 shows a sequencer circuit with possible applications in many systems, and Figure 23 shows the output waveforms. VCC 4 8 RA 33 kΩ 4 8 RB 33 kΩ 4 8 RC RESET VCC RESET VCC RESET VCC 3 3 3 2 OUT 2 OUT 2 OUT TRIG TRIG TRIG 0.001 0.001 S DISCH 7 µF DISCH 7 µF DISCH 7 5 5 5 CONT 6 CONT 6 CONT 6 THRES THRES THRES GND 0.01 GND GND 0.01 0.01 µF 1 µF 1 CB µF 1 CA CC CA = 10 µF CC = 14.7 µF RA = 100 kΩ Output A Output B RC = 100 kΩ Output C CB = 4.7 µF RB = 100 kΩPin numbers shown are for the D, JG, P, PS, and PW packages.NOTE A: S closes momentarily at t = 0. Figure 22. Sequential Timer Circuit See Figure 22 ÏÏÏÏÏ ÏÏ Output A tw A twA = 1.1 RACA ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ tw B ÏÏÏ Voltage – 5 V/div ÏÏÏ Output B ÏÏÏÏÏ twB = 1.1 RBCB ÏÏÏ Output C twC = 1.1 RCCC ÏÏÏ ÏÏÏÏÏ ÏÏ tw C ÏÏÏ t=0 t – Time – 1 s/div Figure 23. Sequential Timer Waveforms14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
  15. 15. IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. To minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third–party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2002, Texas Instruments Incorporated
  16. 16. This datasheet has been download from: www.datasheetcatalog.comDatasheets for electronics components.

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