Published on

  • Be the first to comment

  • Be the first to like this

No Downloads
Total Views
On Slideshare
From Embeds
Number of Embeds
Embeds 0
No embeds

No notes for slide


  1. 1. 525.415 : Embedded Microprocessor Systems Douglas Wenstrand Joseph Haber
  2. 2. Semester Goals <ul><li>System Design : </li></ul><ul><ul><li>Understand the concept of embedded systems </li></ul></ul><ul><ul><li>Be familiar with microprocessor architectural features and peripherals and what types of applications they can enable </li></ul></ul><ul><ul><li>Select appropriate microprocessors and design microprocessor-based hardware systems to handle a particular function </li></ul></ul><ul><li>Software Design </li></ul><ul><ul><li>Be able to program (C, Assembly) and debug said system. </li></ul></ul>In short : Be able to provide end-to-end design solutions for a task which is appropriate for a microprocessor system
  3. 3. Grading <ul><li>Lab Projects : 50% </li></ul><ul><ul><li>Several assignments will be handed out throughout the semester (with defined due-dates). These assignments will involve implementation of a particular task on the evaluation kit and prototyping area. They may also include some written problems. </li></ul></ul><ul><li>Mid-Term : 20% </li></ul><ul><ul><li>Mid-term will focus on processor specific assembly language and architecture. </li></ul></ul><ul><li>Final Project : 20% </li></ul><ul><ul><li>Final project will be a project that combines what we have learned into one “larger” project. </li></ul></ul><ul><li>Quizzes : 10% </li></ul><ul><ul><li>We will assign quizzes based on the weeks reading. These will be very straight forward. </li></ul></ul>
  4. 4. Schedule… <ul><li>Week 1: Introduction to Embedded Programming; Introduction to the Rabbit Microcontroller </li></ul><ul><li>Week 2 : Introduction to Dynamic C; Rabbit Assembly </li></ul><ul><li>Week 3 : Timers </li></ul><ul><li>Week 4 : Serial I/O; Exam </li></ul><ul><li>Week 5 : Networking Communication (TCP/IP) </li></ul><ul><li>Week 6 : Interfacing to External Sensors; A/D & D/A </li></ul><ul><li>Week 7 : Preemptive and Cooperative Multitasking </li></ul><ul><li>Week 8 : Interfacing to External Memory; Power; EMI Issues </li></ul>
  5. 5. Other Topics <ul><li>Memory Interfacing, different types of Memory </li></ul><ul><li>Hardware design of a microprocessor-based emebedded system </li></ul><ul><li>A/D and D/A conversion </li></ul><ul><li>Power Management </li></ul><ul><li>Common Embedded Communication Protocols </li></ul><ul><ul><li>Serial ports </li></ul></ul><ul><ul><li>IrDA </li></ul></ul><ul><ul><li>Ethernet </li></ul></ul><ul><li>Networked embedded systems </li></ul>
  6. 6. Administrative Stuff <ul><li>Class Webpage : </li></ul><ul><ul><li>Notes and Assignments and other data </li></ul></ul><ul><li>Textbook: </li></ul><ul><ul><li> </li></ul></ul><ul><li>Join the class Yahoo “group” </li></ul><ul><ul><li>[email_address] </li></ul></ul><ul><ul><li>We use this as a mailing list for sending information and answering questions. </li></ul></ul><ul><ul><li>Ask questions to the group and answer each other. </li></ul></ul>
  7. 7. Introduction Embedded Micro Concepts and Examples
  8. 8. Dictionary Definitions microprocessor - (Or &quot;micro&quot;) A computer whose entire CPU is contained on one (or a small number of) integrated circuits. The important characteristics of a microprocessor are the widths of its internal and external address bus and data bus (and instruction), its clock rate and its instruction set . Processors are also often classified as either RISC or CISC . microprocessor - (Or &quot;micro&quot;) Any CPU that is contained on a single chip. This little chip is the heart of a computer. Often referred to as just the &quot;processor,&quot; the microprocessor does all the computations like adding, subtracting, multiplying, and dividing. In PCs, the most popular microprocessor used is the Intel Pentium chip, whereas Macintosh computers use the PowerPC chip (developed by Motorola, IBM, and Apple).
  9. 9. 4,8,16,32, DSP, RISC, CISC??? <ul><li>A processor is frequently categorized based on the width of its busses . </li></ul><ul><li>Clock Rate (i.e. at what rate does the processor execute instructions) </li></ul><ul><li>Complexity of Instruction Set </li></ul><ul><ul><li>CISC : Complex Instruction Set Computer </li></ul></ul><ul><ul><li>RISC : Reduced Instruction Set Computer </li></ul></ul>
  10. 10. Interesting Facts <ul><li>Estimated that approximately 2% of all silicon sales are from processors…but 30% of the profits </li></ul><ul><li>Estimated that under 2% of 32-bit processors sold end up in traditional computers </li></ul><ul><li>How many of processors sold today are 32-bit (or 64 for that matter)? </li></ul>
  11. 11. Processor Breakdown by sales Source : Embedded Systems Programming Magazine
  12. 12. Microprocessor Invasion Denon Home Theater In a Box Analog Devices SHARC DSP Maytag “Fuzzy Logic” Washer 8051 Variant Kodak Digital Camera DSP/uP Combo Chip I-River MP3 Player / FM Tuner CONTOUR Spacecraft Instrumentation RTX2010RH Rad-Hard Processor (and others)
  13. 13. Microprocessor Systems in Automobiles The first car to use a microprocessor was the 1978 Cadillac Seville. The chip, a modified 6802, drove the car's &quot;Trip Computer,&quot; a flashy dashboard bauble that displayed mileage and other trivia. (source ESP : 8/03) BMW 7-Series : 100 microprocessors on board Volvo S40 : 50-60 Toyota Echo : 30-40 All Numbers Estimated ESP (8/03)
  14. 14. uP’s in automobiles <ul><li>Cruise Control </li></ul><ul><li>Intermittent Wipers </li></ul><ul><li>Control / Memory for power seats/mirrors </li></ul><ul><li>On Board Diagnostics and Readout </li></ul><ul><li>Navigation System </li></ul><ul><li>Engine Control (ECU) </li></ul><ul><li>(etc) </li></ul>
  15. 15. Embedded Systems Characteristics <ul><li>Real-Time </li></ul><ul><ul><li>Real, defined timing requirements for particular actions to be accomplished </li></ul></ul><ul><li>Event Driven </li></ul><ul><ul><li>Actions of the system are in response to events, not a predefined sequence. </li></ul></ul><ul><li>Resource constrained </li></ul><ul><ul><li>Memory Size, speed, power constrained </li></ul></ul><ul><li>Special purpose </li></ul><ul><ul><li>Device must only perform certain well defined tasks </li></ul></ul>
  16. 16. Design Approaches for Digital Systems <ul><li>Special Purpose Hardware </li></ul><ul><ul><li>Custom IC </li></ul></ul><ul><ul><li>ASIC </li></ul></ul><ul><li>General Purpose Processor </li></ul><ul><ul><li>Pentium </li></ul></ul><ul><ul><li>PowerPC </li></ul></ul><ul><ul><li>Thousands of Others </li></ul></ul><ul><li>FPGA (possibly with embedded general purpose microprocessor) </li></ul>
  17. 17. Design challenge – optimizing design metrics <ul><li>Obvious design goal: </li></ul><ul><ul><li>Construct an implementation with desired functionality </li></ul></ul><ul><li>Key design challenge: </li></ul><ul><ul><li>Simultaneously optimize numerous design metrics </li></ul></ul><ul><li>Design metric </li></ul><ul><ul><li>A measurable feature of a system’s implementation </li></ul></ul><ul><ul><li>Optimizing design metrics is a key challenge </li></ul></ul>
  18. 18. Design challenge – optimizing design metrics <ul><li>Common metrics </li></ul><ul><ul><li>Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost </li></ul></ul><ul><ul><li>NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system </li></ul></ul><ul><ul><li>Size: the physical space required by the system </li></ul></ul><ul><ul><li>Performance: the execution time or throughput of the system </li></ul></ul><ul><ul><li>Power: the amount of power consumed by the system </li></ul></ul><ul><ul><li>Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost </li></ul></ul>
  19. 19. Design challenge – optimizing design metrics <ul><li>Common metrics (continued) </li></ul><ul><ul><li>Time-to-prototype: the time needed to build a working version of the system </li></ul></ul><ul><ul><li>Time-to-market: the time required to develop a system to the point that it can be released and sold to customers </li></ul></ul><ul><ul><li>Maintainability: the ability to modify the system after its initial release </li></ul></ul><ul><ul><li>Correctness, safety, many more </li></ul></ul>
  20. 20. Design metric competition -- improving one may worsen others <ul><li>Expertise with both software and hardware is needed to optimize design metrics </li></ul><ul><ul><li>Not just a hardware or software expert, as is common </li></ul></ul><ul><ul><li>A designer must be comfortable with various technologies in order to choose the best for a given application and constraints </li></ul></ul>Hardware Software Size Performance Power NRE cost Microcontroller CCD preprocessor Pixel coprocessor A2D D2A JPEG codec DMA controller Memory controller ISA bus interface UART LCD ctrl Display ctrl Multiplier/Accum Digital camera chip lens CCD
  21. 21. Time-to-market: a demanding design metric <ul><li>Time required to develop a product to the point it can be sold to customers </li></ul><ul><li>Market window </li></ul><ul><ul><li>Period during which the product would have highest sales </li></ul></ul><ul><li>Average time-to-market constraint is about 8 months </li></ul><ul><li>Delays can be costly </li></ul>Revenues ($) Time (months)
  22. 22. Losses due to delayed market entry <ul><li>Simplified revenue model </li></ul><ul><ul><li>Product life = 2W, peak at W </li></ul></ul><ul><ul><li>Time of market entry defines a triangle, representing market penetration </li></ul></ul><ul><ul><li>Triangle area equals revenue </li></ul></ul><ul><li>Loss </li></ul><ul><ul><li>The difference between the on-time and delayed triangle areas </li></ul></ul>On-time Delayed entry entry Peak revenue Peak revenue from delayed entry Market rise Market fall W 2W Time D On-time Delayed Revenues ($)
  23. 23. Losses due to delayed market entry (cont.) <ul><li>Area = 1/2 * base * height </li></ul><ul><ul><li>On-time = 1/2 * 2W * W </li></ul></ul><ul><ul><li>Delayed = 1/2 * (W-D+W)*(W-D) </li></ul></ul><ul><li>Percentage revenue loss = (D(3W-D)/2W 2 )*100% </li></ul><ul><li>Try some examples </li></ul><ul><ul><li>Lifetime 2W=52 wks, delay D=4 wks </li></ul></ul><ul><ul><li>(4*(3*26 –4)/2*26^2) = 22% </li></ul></ul><ul><ul><li>Lifetime 2W=52 wks, delay D=10 wks </li></ul></ul><ul><ul><li>(10*(3*26 –10)/2*26^2) = 50% </li></ul></ul><ul><ul><li>Delays are costly! </li></ul></ul>On-time Delayed entry entry Peak revenue Peak revenue from delayed entry Market rise Market fall W 2W Time D On-time Delayed Revenues ($)
  24. 24. NRE and unit cost metrics <ul><li>Costs: </li></ul><ul><ul><li>Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost </li></ul></ul><ul><ul><li>NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system </li></ul></ul><ul><ul><li>total cost = NRE cost + unit cost * # of units </li></ul></ul><ul><ul><li>per-product cost = total cost / # of units </li></ul></ul><ul><ul><li>= (NRE cost / # of units) + unit cost </li></ul></ul><ul><li>Example </li></ul><ul><ul><li>NRE=$2000, unit=$100 </li></ul></ul><ul><ul><li>For 10 units </li></ul></ul><ul><ul><ul><li>total cost = $2000 + 10*$100 = $3000 </li></ul></ul></ul><ul><ul><ul><li>per-product cost = $2000/10 + $100 = $300 </li></ul></ul></ul>Amortizing NRE cost over the units results in an additional $200 per unit
  25. 25. NRE and unit cost metrics <ul><li>Compare technologies by costs -- best depends on quantity </li></ul><ul><ul><li>Technology A: NRE=$2,000, unit=$100 </li></ul></ul><ul><ul><li>Technology B: NRE=$30,000, unit=$30 </li></ul></ul><ul><ul><li>Technology C: NRE=$100,000, unit=$2 </li></ul></ul><ul><li>But, must also consider time-to-market </li></ul>
  26. 26. The performance design metric <ul><li>Widely-used measure of system, widely-abused </li></ul><ul><ul><li>Clock frequency, instructions per second – not good measures </li></ul></ul><ul><ul><li>Digital camera example – a user cares about how fast it processes images, not clock speed or instructions per second </li></ul></ul><ul><li>Latency (response time) </li></ul><ul><ul><li>Time between task start and end </li></ul></ul><ul><ul><li>e.g., Camera’s A and B process images in 0.25 seconds </li></ul></ul><ul><li>Throughput </li></ul><ul><ul><li>Tasks per second, e.g. Camera A processes 4 images per second </li></ul></ul><ul><ul><li>Throughput can be more than latency seems to imply due to concurrency, e.g. Camera B may process 8 images per second (by capturing a new image while previous image is being stored). </li></ul></ul><ul><li>Speedup of B over S = B’s performance / A’s performance </li></ul><ul><ul><li>Throughput speedup = 8/4 = 2 </li></ul></ul>
  27. 27. Metric Summary Special Purpose HW General Purpose HW NRE/Dev Cost Speed Flexibility Time to Market Production Cost Our class focuses on this approach
  28. 28. Old Style Embedded SW Design Flow <ul><li>Develop Code which is to be run on Target processor </li></ul><ul><li>Since target is minimal (doesn’t have much memory, I/O…etc. Code development takes place on a separate machine. (a PC) </li></ul><ul><ul><ul><li>Cross Compiler / Assembler </li></ul></ul></ul><ul><ul><ul><li>Simulator </li></ul></ul></ul><ul><li>Code is then run in the target system and observed. Debugging is done based on performance, and any debug support programmed into the software. </li></ul>
  29. 29. Emulation / Debugging <ul><ul><li>In-Circuit Emulator </li></ul></ul><ul><ul><li>Debugger Kernel / BIOS </li></ul></ul><ul><ul><li>Background Debug Mode </li></ul></ul><ul><ul><li>JTAG Emulation </li></ul></ul><ul><ul><li>Debugger </li></ul></ul><ul><ul><ul><li>Interactively Run Code </li></ul></ul></ul><ul><ul><ul><ul><li>Breakpoints </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Single Step </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Watch Variables </li></ul></ul></ul></ul><ul><ul><ul><li>Observe how code interacts with rest of target system </li></ul></ul></ul>One needs to be able to interactively see how code behaves in the real system. After initial code development is done, testing of the code commences on the actual target system (and usually target processor). Development environment is frequently processor specific, less uniform that what you might expect with PC development tools, and more prone to bugs and errors. Since the users are engineers, these things are typically tolerated
  30. 30. Differences between Embedded & Traditional Programming <ul><li>Micros designed for embedded market frequently include peripherals on-board </li></ul><ul><ul><li>Tailored towards a target market </li></ul></ul><ul><ul><li>A/D Converters </li></ul></ul><ul><ul><li>Timers / Counters </li></ul></ul><ul><ul><li>Interrupt Controllers </li></ul></ul><ul><ul><li>General Purpose I/O pins </li></ul></ul><ul><ul><li>Pulse-Width Modulators </li></ul></ul><ul><ul><li>Serial Ports (Buffered / Unbuffered) </li></ul></ul><ul><ul><li>Bus / Protocol Interfaces (IrDA, Ethernet, USB, PCI) </li></ul></ul><ul><li>Device drivers are often time consuming </li></ul><ul><ul><li>peripherals (ex: A/D, Timer, Serial Ports, etc…) generally require lots of register twiddling </li></ul></ul><ul><ul><li>Frequently there are “App Notes” from manufacturer with simple setup code for those who just want to do the basics. </li></ul></ul>Microprocessor versus Microcontroller? Hyder and Perrin (the author’s of our book) claim that the difference is the existence of internal memory, thus making the Rabbit a microprocessor
  31. 31. Rabbit3000 Processor <ul><li>8-bit data bus </li></ul><ul><li>20-bit address bus </li></ul><ul><li>Static Core Design: DC – 54 MHz </li></ul><ul><li>“ Glueless” memory interface </li></ul><ul><li>Clock spreader for EMI reduction </li></ul><ul><li>High frequency clock and 32678Hz clk </li></ul><ul><li>Built-in clock doubler </li></ul><ul><li>4 levels of interrupt priority </li></ul><ul><li>Bootable over serial port </li></ul><ul><li>56 I/O signals (shared with periphs) </li></ul><ul><li>Four PWM channels </li></ul><ul><li>Six UARTs </li></ul><ul><li>Auxillary I/O bus (minimize physical – i.e. capacitive – loading to memory) </li></ul><ul><li>Two input-capture channels </li></ul><ul><li>Two quadrature decoders </li></ul><ul><li>Built-in watchdog timers </li></ul>
  32. 32. RabbitCore 3000 Module <ul><li>Rabbit processors are sold as RabbitCore modules, which incorporate the basic functionality (i.e., memory, flash, oscillator, Ethernet MAC) on a single board </li></ul><ul><li>They will license the “IP” so that the core can be dropped onto a new PCB “as is” </li></ul>
  33. 33. General Purpose I/O Pins Embedded uP Any piece of HW here that needs or Produces digital signals for the uP to see Using GPIO pins to talk to devices with some sort of serial protocol is often called “Bit-Banging”. This is another use for general purpose I/O pins : to replace Hardware with software. (save $$$)
  34. 34. Microprocessor I/O port Registers : DDR (Data Direction Register) ‘1’ if port is an output, ‘0’ if input Output Data Register : if output, value in register is written to the port if ddr = ‘1’ then outport <= data; else outport <= ‘Z’; end if;
  35. 35. Handling GPIO (or Parallel Ports) Assuming that hardware is designed so that desired signals are hooked up to a known port “pin”. Find that pin based on its port name and bit. If the port is a general purpose I/O pin, there will be at least 2 registers that you need to deal with : the DDR (Data Direction Register) and the Data Register. Typically the DDR is setup such that on RESET, the direction defaults to “input”, so you must write to the bits which are to be outputs. Next, write the value you want in the bits that you want to the data register for that port. In some processors that may be : *PGDR = 0x1 // set portg to all 0, and bit 0 = 1 // assumes that PGDR is defined to be the right address Dynamic C, Rabbit 3000 : WrPortI(PGDR,&PGDRShadow,0x1);
  36. 36. GPIO (cont) To read the value of a port : you simply get the contents of the Data Register (typically). Temp = *PGDR; //(in some processors) now Temp contains the value of the port Dynamic C / R3000 : temp = RdPortI(PGDR); A.4 Rabbit 2000/3000 Internal registers Macros are defined for all of the Rabbit’s I/O registers. A listing of these register macros can be found in the Rabbit 2000 Microprocessor User’s Manual and the Rabbit 3000 MIcroprocessor User’s Manual . A.4.1 Shadow Registers Shadow registers exist for many of the I/O registers. They are character variables defined in the BIOS. The naming convention for shadow registers is to append the word Shadow to the name of the register. For example, the global control status register, GCSR, has a corresponding shadow register named GCSRShadow. The purpose of the shadow registers is to allow the program to reference the last value programmed to the actual register. This is needed because a number of the registers are write only.
  37. 37. Rabbit General Purpose I/O
  38. 38. Drive Control Register: Open Drain 5V Rabbit doesn’t have this inverter. Input Gate Output 1 0 “H” (5V) 0 1 0V
  39. 39. Dynamic C Quick Intro: Compilation <ul><li>Dynamic C is NOT ANSI C </li></ul><ul><li>Dynamic C library files end with a “.LIB” extension, and are source files that can be opened with a text editor </li></ul><ul><li>Dynamic C builds code differently from the traditional edit/compile/link/download cycle </li></ul><ul><li>Each time code is run, Dynamic C does a complete build </li></ul>edit Compile Source + Compile Libraries + Link All Together (no errors) errors? program
  40. 40. Dynamic C Quick Intro: BIOS <ul><li>When Dynamic C compiles a user's program to a target board, the BIOS (Basic Input-Output System) is compiled first, as an integral part of the user's program. The BIOS is a separate program file that contains the code needed to interface with Dynamic C. Normally, it also contains a software interface to the user's particular hardware. Certain drivers in the Dynamic C libraries require BIOS routines to perform tasks that are hardware-dependent. </li></ul><ul><li>The BIOS also: </li></ul><ul><ul><li>Takes care of microprocessor system initialization, such as the setup of memory. </li></ul></ul><ul><ul><li>Provides the communications services required by Dynamic C for downloading code and performing debugging services such as setting breakpoints or examining data variables. </li></ul></ul><ul><ul><li>Provides flash drivers. </li></ul></ul><ul><ul><li>A single, general-purpose BIOS is supplied with Dynamic C for the Rabbit 3000. This BIOS allows Dynamic C to boot up on any Rabbit-based system that follows the basic design rules needed to support Dynamic C. The BIOS requires both a flash memory and a 32 KB or larger RAM, or just a 128 KB RAM, for it to be possible to compile and run Dynamic C programs. If the user uses a flash memory from the list of flash memories that are already supported by the BIOS, the task will be simplified. </li></ul></ul>Note: BIOS is an acronym for B asic I nput/ O utput S ystem
  1. A particular slide catching your eye?

    Clipping is a handy way to collect important slides you want to go back to later.