Unit – IV Embedded HardwareAll the processors store their data and program codes in memory butin some cases the memory resides on the same chip as the processor ,but most of the memory chips are located externally.The processors communicates with memory by suing address bus andthe data bus.For reading and writing data at some particular location the processorfirst writes the desired address onto the address bus and then the datausing the data bus.Memory Map-•A memory map is the structure of the data that indicates howmemory is laid out.•Memory maps can have different meaning in different parts of theoperating system.•In boot process a memory map is passed on from the firmware inorder to instruct an operating system kernel about memory layout.
• It contains the information regarding the size of total memory, any reserved regions and also provide details specific to architecture.• In the below diagram there are three devices attached to the address and data buses.• These devices are the RAM and ROM and a Serial Controller “Zilog 85230”.• RAM is located at the bottom of memory and extends upward for the first 128 KB of the memory space.• The ROM is located at the top of memory and extends downward for 256 KB. But this area of memory actually contains two ROMs an EPROM and a Flash memory device each of size 128 KB.• The third device the Zilog 85230 Serial Communications Controller, is a memory-mapped peripheral whose registers are accessible between the addresses 70000h and 72000h.
I/O MAP• To communicate with input/output devices the concept of I/O map is used.• The process of creating the I/O map is similar to memory mapping.• Memory –mapped I/O uses the same address but to address both memory and I/O devices.• The memory and registers of the I/O devices are mapped to address values.• When an address is used by the CPU it may refer to a portion of physical RAM or it can refer to memory of the I/O device.• The CPU instructions used to access the memory are also used for accessing devices.• Each I/O device monitors the CPU’s address bus and responds to any of the CPU’s access of address space assigned to that device connecting the data bus to a desirable device’s hardware register.
Interrupt• Interrupt is something that produces some kind of interruption.• In microprocessor and microcontroller systems an interrupt is defined as a signal that initiates changes in normal program execution flow.• The signal that generates changes in normal program execution flow may come from an external device connected to the microprocessor/controller requesting the system that it needs immediate attention or the interrupt signal may come from some of the internal units of the processor/controller such as timer overflow indication signal.
Why Interrupts?•From programmer point of view interrupt is a boon.•Interrupts are very useful in situations where you need toread or write some data from or to an externally connecteddevice.•Without interrupts the normal procedure adopted is poolingthe device to get the status.•We can write the program in two ways to pool the device.•In the first method the program pools the devicecontinuously till the device is ready to send data to thecontroller or ready to accept data from the controller.•This technique achieves the desired objective effectively bysacrificing the processor time for that single task.•Whenever there is a chance of program hang up and thetotal system to crash in certain situations where the externaldevice fails or stops functioning.
• Another approach for implementing the pooling technique is to schedule the pooling operation on a time slice basis and allocate the total time on a shared basis to rest of the tasks also.• This leads to more effective utilization of the processor time.• The biggest drawback of this approach is that there is a chance for missing some information coming from the device if the total tasks are high in number.• Here comes the role of interrupts. If the external device supports interrupt we can connect the interrupt pin of the device to the interrupt line of the controller.• Enable the corresponding interrupt in firmware. Write the code to handle the interrupt request service in a separate function and put the other tasks in the main program code.• Here the main program is executed normally and when the external device asserts an interrupt the main program is interrupted and the processor switches the program execution to the interrupt request service.• On finishing the execution of the interrupt request service the program flow is automatically diverted back to the main stream and the main program resumes its execution exactly from the point where it got interrupted.
USE of InterruptsIn any interrupt based systems interrupts aremainly used for accomplishing the following tasks:1.I/O data transfer between peripheral a devicesand processor/controller.2.Timing applications3.Handling emergency situations example- switchoff the system when the battery status falls belowthe critical limit in battery operated systems.4.Context switching /Multitasking/ Real-Timeapplication programming.5.Event driven programming.
Interrupt Map• The embedded systems have few handful of interrupts.• These interrupts are associated with an interrupt pin and an interrupt service routine (ISR).• For the execution of correct interrupt service routine a mapping is required between interrupt pins and interrupt service routine.• This mapping usually takes the form of an interrupt vector table.• The vector table is just an array of pointers to functions located at some known memory address.• The processor uses the particular interrupt as its index into this array.• The value stored at that location in the vector table is usually just the address of the interrupt service routine to be executed.• Now the system requires initializing the interrupt vector table correctly.• This is achieved by using the following:1. Create an interrupt map that organizes the relevant information.2. Create an interrupt map that is a table contains a list of interrupt types and the devices to which they refer.3. Add board-specific header file. Each line of the interrupt map becomes a single #define within the file.
Processor Family• A set of related processors from the same manufacturer is called as Processor family.• The term processor refers to any three type of devices known as microprocessors, microcontrollers and Digital Signal Processors.• DSP –• The third type of processor is a digital signal processor or DSP.• The Central processing unit within a DSP is specially designed to perform discrete-time signal processing calculations ex- the processors for audio and video communications.• The DSP performs such calculations much faster than other processors they offer a powerful, low-cost microprocessor alternative for designers of modems and other telecommunications.• Two common DSP families are the TMS320CX and 5600X series from TI and Motorola.
Memory• Memory is an important part of a processor/controller based E.S.• Some of the procoessors/controllers contain built in memory and this memory is reffered as on-chip memory.• Others which do not contain any memory inside the chip requires external memory to be connected with the controller/processor called off-chip memory
ROM• The program memory or code storage memory of an E.S stores the program instructions and it can be classified into different types• ROM(Read Only Memorty) –It retains its contents even after the power to it is turned off.It is a non-volatile memory.Examples of non-volatile memory include read-only memory, flash memory, most types of magnetic computer storage devices like hard disks, floppy discs, etc.
• Masked ROM (MROM)-It is a one-time programmable device.It makes use of the hardwired technology for storing data.The device is factory programmed by masking and metallization process at the time of production itself, according to the data provided by the end user.Advantage –Low cost for high volume production.They are the least expensive type of solid state memory.Different mechanisms are used for the masking process of the ROM, like1. Creation of an enhancement or depletion mode transistor through channel implant.2. By creating the memory cell either using a standard transistor or a high threshold transistor. In the high threshold mode the supply voltage required to turn ON the transistor is above the normal ROM IC operating voltage. This ensures that the transistor is always off and the memory cell stores always logic 0.Masked ROM is a good caandidate for storing the embedded firmware for low cost embedded devices.Once the design is proven and the firmware requirements ate tested and frozen the binary data corresponding to it can be given to the MROM fabricator.The limitation with MROM based firmware storage is the inability to modify the devices firmware against firmware upgrades.Since the MROM is permanent in bit storage it is not possible to alter the bit information.
• PROM/OTPUnlike masked ROM, One Time Programmable Memory is not pre-programmed by the manufacturer.The end user is responsible for programming these devices.It has nichrome or polysilicon wires arranged in a matrix.These wires can be functionally viewed as fuses.It is programmed by a PROM programmer which selectively burs the fuses according to the bit pattern to be stored.Fuses which are not blown represents a logic 1 whereas fuses which are blown represents a logic 0.The default state is logic 1.OTP is widely used for commercial production of embedded systems whose protyped versions are proven and the code is finalised.It is low cost solution for commercial production.OTPs cannot be reprogrammed.
EPROM –During the development phase the code is subject tocontinuous changes and using OTP each time to load thecode is not economical.This is flexible to re-program the same chip.It stores the bit information by charging the floating gate ofan FET.Bit information is stored by using an EPROM programmerwhich applies high voltage to change the floating gate.EPROM contains a quartz crystal window for erasing thestored information.If the window is exposed to ultraviolet rays for a fixedduration the entire memory will be erased. Even though the EPROM chip is flexible in terms of re-programmability it needs to be taken out of the circuit boardand put in a UV eraser device for 20 to 30 minutes.
EEPROM-The information contained in the EEPROM canbe altered by using electrical signals at theregister/Byte level.They can be erased and reprogrammed in-circuit.These chips include a chip erase mode and inthis mode they can be erased in a fewmilliseconds.It provides greater flexibility for systemdesign.The only limitation is their capacity is limitedwhen compared with the standard ROM.
FLASH –It is the latest ROM technology and is the most popular ROMtechnology used in today’s E.S.It is a variation of EEPROM technology.It combines the reprogram ability of EEPROM and the high capacityof standards ROMs.Flash memory is organised as sectors or pages.It stores information in an array of floating gate MOSFET transistors.The erasing of memory can be done at sector level or p age levelwithout affecting the other sectors or pages.Each sector/page should be erased before re-programming.The typical erasable capacity of FLASH is 1000 cycles.NVRAM –Non-volatile RAM is a random access memory with battery backup.It contains static RAM based memory and a minute battery forproviding supply to the memory in the absence of external powersupply.
RAM• It is the data memory or working memory of the controller/processor.• Controller/processor can read from it and write to it.• It is volatile in nature.• RAM is direct access memory meaning we can access the desired memory location directly without the need for traversing through the entire memory locations to reach the desired memory position.• The types of RAM are :1. Static RAM (SRAM)2. Dynamic RAM (DRAM)3. NVRAM
SRAM –It stores data in the form of voltage.They are made up of flip-flops.It is the fastest form of RAM available.In typical implementation an SRAM cell is realised using six transistors.Four of the transistors are used for building the latch (flip-flop) part of the memory cell and two forcontrolling the access.SRAM is fast in operation due to its resistive networking and switching capabilities.DRAM –It stores the data in the form of charge.They are made up of MOS transistor gates.They have high density and low cost compared to SRAM.As the information is stored as charge it gets leaked off with time and to prevent this they need to berefreshed periodically.Special circuits called DRAM controllers are used for the refreshing operation.The refresh operation is done periodically in milliseconds interval.The MOSFET acts as the gate for the incoming and outgoing data whereas the capacitor acts as the bitstorage unit.NVRAMIt is random access memory with battery backup.It contains static RAM based memory and a minute battery for providing supply to the memory in theabsence of external power supply.The memory and the battery are packed together in a single package.NVRAM is used for the non-volatile storage of results of operations or for setting up of flags etc.The life span of NVRAM is expected to be around 10 years.
Memory Testing• Testing is a disciplined process that consists of evaluating the application behavior, performance and robustness against expected criteria.• One of the main criteria is to be defect free.• Expected behavior, performance and robustness should be both formally described and measurable.• Embedded systems are in every intelligent device that is infiltrating our daily lives, like the cell phone and the entire wireless infrastructure behind it.• At first writing the memory test may seem like a fairly simple but when we look at the problem closely we find that it can be difficult to detect subtle memory problems with a simple test.• The purpose is to confirm that each storage location in a memory device is working.• The basic idea behind any memory test is to write some set of data to each address in the memory dev ice and verify the data by reading it back.• If all the values read back are the same as those that were written then the memory device is said to pass the test.Memory test techniques:Data Bus TestAddress Bus TestDevice Test
DATA BUS TEST• The first step to test the memory is the data bus test in which data bus wiring is properly tested to confirm that any value placed on the data bus by the processor is correctly received by the memory device at the other end.• The most obvious way to test that is to write all possible data values and verify that the memory devices stores each one successfully.• Good way to test each bit independently is to perfor the walking 1’s test.• The table below shows the data patterns used in an 8 bit version of this test.
• To perform the walking 1’s test simply write the first data value in the table.• Verify it by reading it back.• Write the second value verify and so on.• When you reach the end of the table the test is complete.• It is okay to do the read immediately after the corresponding write this time because we are not yet looking for the missing chips.• This test provides meaningful results even if the memory chips are not installed.
Address Bus Test• After the data bus test the next test is the address bus test.• Address bus problems leads to overlapping memory locations.• Many possible addresses could overlap.• It is not necessary to check every possible combinations but we should instead follow the example of the data bus test and try to isolate each address bit during testing.• We just need to confirm that each of the address pins can be set to 0 and 1 without affecting any of the others.• The smallest set of addresses that will cover all possible combinations is the set of “POWER – OF – TWO” addresses.• These addresses are analogous to the set of data values used in the walking 1’s test.• The corresponding memory locations are 0001h,0002h,0004h,0008h,0010h,0020h and so on.• In addition the address 0000h must also be tested.• The possibility of overlapping locations makes the address bus test harder to implement.• After writing to one of the addresses, we must check that none of the others has been overwritten.
Device Test• After checking the address and data bus wiring are working it is necessary to test the integrity of the memory device itself.• The thing to test is that every bit in the device is capable of holding both 0 and 1.• This is a straightforward test to implement but it takes significantly longer to execute than the previous two.• For a complete device test we must visit every memory location twice.• We are free to choose any data value for the first pass, so long as you invert that value during the second.• And as there is a possibility of missing memory chips it is best to select a set of data that changes with the address.• Simple example is an “increment test”.
Unit – V PeripheralsControl and Status Registers:An embedded processor interacts with a peripheral device through a set of Control and Statusregisters.The registers are part of peripheral hardware , their locations, size and individual meaning arefeatures of the peripheral.Ex- Registers within a Serial controller are very different from those in a timer.The control and status registers are used in embedded system as an interface between theperipherals and the Embedded processor.The basic interface between an embedded processor and a peripheral device is a set of control andthe status registers.The CRS is mainly used to determine the outcome of conditional branch instructions or other formsof conditional execution.These registers are part of the peripheral hardware, and their locations, size and individual meaningsare features of the peripheral.The peripherals are located in either processor’s memory space or within the I/O space.These are called memory-mapped and I/O mapped peripherals.The memory-mapped peripherals are generally easier to work and are frequently used in embeddedsystems.Memory – mapped control and status resgisters can be made to look just like ordinary variables.
Device Driver• A device driver is a specific type of computer software which is developed to allow interaction with hardware devices.• A device driver simplifies programming by acting as translator between a hardware device and the applications or os that use it.• The following programming interface provided for a flash driver should work with any flash memory device:Void flashErase(unit32_t sector);Void flashWrite(unit32_t offset, unit8_t *pSrcAddr, unit32_t numBytes);
• These two calls closely resemble the way all flash chips work in regard to reads and writes.• Most devices have differences in their programming model and a device driver for one device is not likely to work with another device.• The device differences that affect device driver implementation are:1. Feature set2. SFR control/status bit configuration3. Chip pin-out4. Interrupt structure5. Memory configurationAs the device drivers have tight connection to the target device and the development environment they are usually not portable.This reduces the possibilities for code reuse and increases the cost, time and efforts needed to migrate a software project form one microcontroller device to another.Before writing a driver library the hardware manuals must be studies as both the chip internals and the electronic board design must be fully a rather tedious task.Design and implementation requires not only programming experience but also expertise in hardware design and development tools.
Device Driver ArchitectureA device driver performs two main functions:I.Device configuration and initializationII.Data movementDevice configuration- It is specific to a particulardevice.Data movement – is generic.Device Drivers can be classifies as :1.Class Driver2.Mini-Driver
Class Drivers• It is a type of hardware device driver that can operate a large number of different devices of a broadly similar type.• They are often used with USB based devices which share the essential USB protocol in common and devices with similar functionality can easily adopt common protocols.• Instead of having a separate driver for every kind of CD-ROM device a class driver can operate a wide variety of CD-ROMs from different manufactures.
Mini Driver• It is responsible for all device-specific initialization and control and for passing a buffer of data to the class driver.• It defines a standard interface to the class driver since it enables a class driver to work with multiple mini-drivers or vice versa.
Device Driver Design• Most of the E.S have more than one device driver.• Some of the areas to be considered when designing a software architecture that includes various device drivers are:Interrupt priorities• If the interrupts are used for the device drivers in a system ,we need to determine and set appropriate priority levels.Complete Requirements• We need to know the requirements of the various peripherals in the system.• It is better to use software design reviews to flush out any potential problems that might have been overlooked by an individual developer.
Resource Usage•It is very important to understand what resources arenecessary for each device driver.•Example – To design an Ethernet device driver in a systemwith a very limited amount of memory.•This limitation would affect the buffering schemeimplemented in the Ethernet driver.•The driver might accommodate the storage of only fewincoming packets, which would affect the throughput of theEthernet interface.Resource Sharing•We have to be aware of the possible situations wheremultiple device drivers need to access common hardware orcommon memory.•This can make it difficult to track down bugs if the sharingscheme is not thoroughly thought out ahead of time.
Timer Driver• Timer devices are hardware peripherals that count clock ticks and can generate periodic interrupt requests.• A timer device is used to provide number of time-related facilities such as: HAL system clock Alarms The time-of –day and Time measurement• The constructor for the Timer class is also the device driver’s initialization routine.• It ensures that the timer/counter hardware is actively generating a clock tick every 1 millisecond.• The other methods of the class-start, wait for and cancel – provide an API for an easy-to-use software timer.• These methods allow application programmers to start one-shot and periodic timers wait for them to expire, and cancel running timers etc.
Watchdog Timer• Watchdog timer or a watchdog is a hardware timer for monitoring the firmware execution.• Depending on the internal implementation the watchdog timer increments or decrements a free running counter with each clock pulse and generates a reset signal to resent the processor if the count reaches zero for a down counting watchdog or the highest count value for an up counting watchdog.• If the watchdog counter is in the enabled state, the firmware can write a zero to it before starting the execution of a piece of code and the watchdog will start counting.• If the firmware execution doesn’t complete due to malfunctioning within the time required by the watchdog to reach the maximum count the counter will generate a reset pulse and this will reset the processor .• If the firmware execution completes before the expiration of the watchdog timer you can reset the count by writing a 0 to the watchdog timer register.
• As shown in the above diagram the watchdog timer is a chip external to the processor.• It could also be included within the same chip as the CPU. This is done in many microcontrollers.• The output from the watchdog timer is tied directly to the processer’s reset signal.Watchdog timers are classified into two:1.Internal WDTs2.External WDTs
Internal WDTs•Internal watchdogs are those that are build into theprocessor chip.•All highly integrated embedded processor include awealth of peripherals with some sort of watchdog.•Most are brain-dead WDTs suitable for only the lowest –end applications.External WDTs•External watchdog timers are used in the systemexternally.•It means that if the timer is not built into the processorit is called as external watchdog timer.•Many of the supervisory chips are available to manage aprocessor’s reset line include built-in WDTs.
Embedded operating system• An embedded operating system is an operating system specially designed to operate an embedded computer systems.• The operating system organizes and controls the hardware and it is that piece of software that turns the collection of hardware blocks into a powerful computing tool.
Functions of O.SProcessor ManagementThe main tasks in processor management areensuring that each process and application receivesenough of the processor’s time to function properlyusing maximum procoessor cycles for real work asit is possible and switch between processes in amulti-tasking environment.Memory and storage managementIt includes allotting enough memory required foreach process to execute and efficiently use thedifferent types of memory in the system.
Device Management•The o.s manages all hardware not on thecomputer’s motherboard through driver programs.•Drivers provide a way for applications make use ofhardware subsystems without having to knowevery detail of the hardware’s operation.•The driver’s function is to be the translatorbetween the electrical signals of the hardwaresubsystems and the high-level programminglanguages of the operating system and applicationprograms.
Providing common Application Interface•It lets the application programmers use functionsof the computer and operating system withouthaving to directly keep track of all the details in theCPU’s operation.•Once the programmer uses the APIs the operatingsystem connected to drivers for the varioushardware subsystems deals with the changingdetails of the hardware.Providing Common User Interface•A user interface brings a formal structure to theinteraction between a user and the computer.•All the developments in user interfaces have beenin the area of the graphical user interface.
Types of Operating SystemThe Operating systems are classified in to fourtypes :Single-user, single task•This o.s is designed to manage the computer sothat one user can effectively do one thing at atime.•The Palm OS for palm computers is a goodexample.
Single-user,multi-tasking•This type of operating system most of us use on ourdesktop and laptop computers today.•Examples are windows 98 and MacOS that let a singleuser have several programs in operation at the sametime.Multi-user•It allows many different users to take advantage of thecomputer’s resources .•The O.S must make sure that the requirements of thevarious users are balanced and each of the programsthey are using has sufficient and separate resources sothat a problem with one user doesn’t affect the otherusers.•Ex – UNIX is an multi-user O.S
Real-time Operating System•The main task of a RTOS is to manage theresources of the computer such that a particularoperation executes in the same amount of timeevery time it occur.•In a complex machine having a part move morequickly just because system resources areavailable may be just as catastrophic as having itnot to move at all because the system is busy.
RTOS• RTOS is an operating system that supports the construction of real-time systems.• Real-time computing is where system correctness not only depends on the correctness of logical result but also on the result delivery time.• The RTOS should have predictable behavior to unpredictable external events.• A good RTOS is one that has a bounded behavior under all system load scenario i.e even under simultaneous interrupts and thread execution.• A true RTOS will be deterministic under all conditions.• Most of the embedded operating systems today are designed for possible inclusion in real-0time systems.• An operating system is said to be deterministic if the worst-case execution time of each of its system calls is calculable.• Some of the characteristics of embedded system OS are as follows:1. Large and complex2. Concurrent control of system components3. Facilities for hardware control4. Extremely reliable and safe5. Real time facilities6. Efficiency of execution
Selection Process of an O.S• One of the most critical decisions that first arise when starting a new embedded system project is the selection of the O.S.• The proper or improper choice of an O.S can affect every aspect of the development project form licensing cost to development time.• Hardware decisions such as processor selection and memory size will hinge on the OS selections.• The selection of embedded operating system depends upon the hardware used and the function for which the system is designed .• Some of the points for selection of an embedded operating system are as follows:
Trends on OS selection trend to line up by industry•Most of the consumer electronics devices thatfocus on small and cheap often opt for nooperating system.•These types of devices are simple in functionwithout the overhead of an OS.•Ex – microwave.•Computer peripherals and networking devicesfrequently go with commercial OS offerings.•An intelligent and feature-rich product is likely torequire a commercial-grade OS.•Selecting a commercial OS could translate intohigher costs than if you had selected open – source.
For those developers using a commercial OS•For the commercial OS users VxWorks stillholds a strong lead but Microsoft products XPembedded and Windows CE are rapidly makingheadway.•But fewer home-grown systems are around ascompared to similar survey of the data theprevious year.•Exception would be the automotive industrywhere commercial OS are selected only 33% ofthe time.
What about Open-source OS•20% of the developers among the 28% of those choosing an OS are usingLinux or some form of Open-source.•What type of OS is typically selected for your industry?•There are reasons why certain industries use specific Oss.•It is always safer to select an OS that is widely accepted.Other Considerations in OS Selection•The next set of survey questions is focused on criteria developers used toselect an OS.•The real-time performance was the most important closely followed byprocessor compatibility.•The availability of software tools comes in the second place which isfollowed by royalty fees and purchase price.•Non- technical criteria like support, trust and reputation plays an ever-largerrole.•Memory footprint and simplicity both are ranked highly.•Memory usage like performance, determines whether the OS is suitable forthe task.•Simplicity determines whether the developer should even bother or not.