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Hardware behind the WSN (Wireless Sensor Network -- the nodes "motes")

Hardware behind the WSN (Wireless Sensor Network -- the nodes "motes")

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  • 07/27/10
  • 07/27/10

Chapter 3 (Hw) E Chapter 3 (Hw) E Presentation Transcript

  • Two-day Course : Self-Organizing Wireless Networks (SOWN) 813.205.2661 World Bridge innovations, LLC Wbi@mac.com Low-power, wireless node networks Chapter III: Hardware 20-21 July 2009 JHU/APL Laurel, Maryland Timothy D. Cole World Bridge innovations (WBi) LLC
  • AGENDA
    • INTRODUCTION
    • BACKGROUND
    • MOTE DESIGN
    • CASE STUDIES
    • DESIGN CONSIDERATIONS
  • MOTE DESIGN (HW): Agenda
    • Hardware
      • Design goals
      • Microprocessor system
      • Summary of RF propagation issues & considerations
      • RF transceiver implementation
      • TOS Data packet definition & implementation
      • I/O design approaches & considerations
    • Network Management System (NMS)
    • Software
    • Sensor Modalities
  • MOTE DESIGN (HW): Objectives
    • CHAPTER III Objectives:
      • System overview, hardware perspective
      • Microcontroller (mC) system description
      • Top level behind purpose & performance of RF modulation
      • Comprehend and use range equation to produce first order performance results.
      • Evaluate sensor modalities
      • Discuss principles behind packet radio
      • Aware of link detractors
      • Antenna design review -- first order evaluation of performance
      • Understand IEEE standards
      • Define packet definitions for the WSN system (e.g., TOS)
      • I/O design considerations
    © Timothy D. Cole, 2009
  • MOTE DESIGN (HW): Design goals
    • Ultra-low power consumption and requirements
    • Matched RF & sensor (e.g. range) performance
    • Efficient RF spectrum usage
    • High integration capability
    • Readily reconfigurable hardware/firmware
    • Satisfy interface requirements (standards) and compliance
    • Supports software SDK environments
    • Robust design and execution
    • Supported functionality with cost-effective components
    • Maintain suitable performance
    • Promotes standard interfaces (sensor integration)
    • Adequate microcontroller characteristics (mem size, ADC bits, …)
  • MOTE DESIGN (HW): Design results – Myriad of small sensors, for WSN apps
  • MOTE DESIGN (HW) : System Overview RF/Processing Board Sensor Board Interface Board The RF/Processor Board (MPR300CB) which contains the micro controller that will provide all of the necessary control, processing, and communication signals to the sensors as well as the transmission of data over the wireless link station. The Sensor Board (MTS310CA), which contains the sensors and connects on top of the RF/Processor Board via a 51 pin connector. This board contains anywhere from 2-5 sensors and is responsible for gathering data. The Interface Board (MIB300CA), which acts as a Base Station and is used for programming the RF/Processor Board, or transferring data collected by the sensors to a PC via the serial port, or communication port.
  • MOTE DESIGN (HW): Microprocessor system
    • Wisenet mote
    Sensor board Interface board Processing board
  • INTRODUCTION: Concepts involved (moteiv Tmote Sky)
  • MOTE DESIGN (HW): Concepts involved (Tmote Sky diagram) Mote core RF Antenna Sensors Radio stack Microcomputer (w/ADC) Memory I/O I/O
  • MOTE DESIGN (HW): Mote evolution, 1999-2003
  • MOTE DESIGN (HW): NEST Hardware, mote + relay -- XSM, TXSM, XSS (Stargate relays) Extreme Scale Mote (XSM) MICA II (listener & basemote) XSM & Tactical XSM (TXSM) Low Level Node – Extreme Scaling Mote (XSM)
    • Atmel Atmega 128L Micro-controller
    • 4Mbit of Flash
    • Sensors (Magnetic, Acoustic, Passive Infrared)
    • Radio (Chipcon CC1000)
    • 51-pin MICA2 connector
    • Weather proof package Batteries (two alkaline AA)
    Relay Node – Extreme Scaling Stargate (XSS)
    • Intel PXA255 RISC Processor (400 MHz)
    • 64 MB SDRAM, 32 MB Flash
    • Wireless/802.11 Card
    • WAAS GPS and antenna
    • Ethernet, Serial, JTAG, and USB ports
    • 51-pin MICA2 connector
    • Weather proof package
    • Battery pack/Batteries
    TIER 1 TIER 2
  • MOTE DESIGN (HW): XSM Mote, 2004 passive infrared acoustic magnetic Mote
  • MOTE EVOLUTION -- 2007 25.4mm 18.0mm 16-bit Microcontroller 8MHz, 10kB RAM, 48kB Flash Serial bus connectivity 1MB EEPROM Storage with write-protected segments IEEE 802.15.4 Radio 0dBm and +20dBm output FCC/IC certified Multiple Antenna Options External U.Fl connector or Soldered PCB antennas Dual-functionality Device Soldered OEM mote miniSD PDA connectivity
  • MOTE DESIGN (HW): RF design and considerations
    • RF link metrics & issues
    • RF spectrum use
    • RF propagation concerns
    • RF antenna designs
    • Data packet design & implementation
    • Transceiver (chipset) approach
    • TOS Messages
  • MOTE DESIGN (HW): RF Link Metrics
  • MOTE DESIGN (HW): Common RF Link Problems
  • MOTE DESIGN (HW): Radio Signal Propagation
  • MOTE DESIGN (HW): MultiPath
  • MOTE DESIGN (HW): Indoor Propagation
  • MOTE DESIGN (HW): RF Solutions - Signal Power & Wavelength
  • MOTE DESIGN (HW): RF Solutions - Distortion fvom local environs
  • MOTE DESIGN (HW): RF Solutions - RF & data comms
  • MOTE DESIGN (HW): RF Issues
  • MOTE DESIGN (HW): Debugging Hints
  • MOTE DESIGN (HW): RF Frequencies & Channels
  • MOTE DESIGN (HW): RF Signal Measure, RSS
  • MOTE DESIGN (HW): RF Solutions - Next-Gen RF Technology
    • RF Antenna
      • Resonator design
      • Reduces “ground” effect
      • Testing ~ Oct 07
  • TXSM (433 MHz) Tier 1 MEASURED RANGE PERFORMANCE
  • MOTE DESIGN (HW): RF Solutions - Standard Was CC1OOO
  • MOTE DESIGN (HW): Comparison of Radiostacks
  • MOTE DESIGN (HW): MICA2 TOS Wireless Packet
  • MOTE DESIGN (HW): RF CONCLUSION
  • MOTE DESIGN (HW): Finally, I/O design and considerations
    • I/O interfaces
      • JTAG
      • SPI (SDIO)
      • USB (WUSB, USB3)
      • UART
      • I2C (SMBus)